公开(公告)号：KR1020130003665A

公开(公告)日：2013-01-09

申请号：KR1020110065136

申请日：2011-06-30

Applicant: 삼성전자주식회사 ,  한양대학교 산학협력단

Inventor： 김배형 ,  김동욱 ,  김선일 ,  오홍식 ,  김인영

IPC: A61B8/00 ,  G06T19/00 ,  G06F19/00

CPC classification number: A61B8/52 ,  G06F19/00 ,  G06T7/0012 ,  G06T19/00

Abstract: PURPOSE: A data processing apparatus, a medical imaging system and a method for generating a diagnosis image are provided to reduce the quantity of calculation by performing a domain conversion process and a coordinate conversion process at the same time. CONSTITUTION: A data conversion part(110) coveters the data expressing 3D information about an object in a frequency domain into a data set. The data set represents 2D information about the object. A domain and coordinate conversion part(120) perform a domain conversion process and a coordinate conversion process at the same time. In the domain conversion process, the data set of the frequency domain is converted into a time domain. In the coordinate conversion process, the data set of a cylindrical coordinate system is converted into a rectangular coordinate system. [Reference numerals] (110) Data conversion part; (120) Domain and coordinate conversion part

Abstract translation: 目的：提供一种数据处理装置，医疗成像系统和用于产生诊断图像的方法，以通过同时执行域转换处理和坐标转换处理来减少计算量。 构成：数据转换部分（110）使表示关于频域中的对象的3D信息的数据成为数据集。 数据集表示关于对象的2D信息。 域和坐标转换部分（120）同时执行域转换处理和坐标转换处理。 在域转换过程中，频域的数据集被转换成时域。 在坐标转换处理中，将圆柱坐标系的数据集转换为直角坐标系。 （附图标记）（110）数据转换部; （120）域和坐标转换部分

公开(公告)号：KR1020110083934A

公开(公告)日：2011-07-21

申请号：KR1020100003927

申请日：2010-01-15

Applicant: 삼성전자주식회사

Inventor： 김선일 ,  박재철 ,  김상욱 ,  박영수 ,  김창정

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969 ,  H01L29/78606 ,  H01L27/1214

Abstract: PURPOSE: A transistor, a manufacturing method thereof, and an electronic device including the same are provided to suppress the property variation of a transistor due to light and moisture by including a second passivation layer including fluorine. CONSTITUTION: A source(S1) and a drain(D1) are connected to both ends of a channel layer(C1). A gate(G1) corresponds to the channel layer. A gate insulation layer(Gl1) is formed between the channel layer and the gate. A first passivation layer(P11,P12) covers the source, the drain, the gate, and the gate insulation layer, and the channel layer. The second passivation layer is formed on the first passivation layer and includes fluorine.

Abstract translation: 目的：提供晶体管及其制造方法以及包括该晶体管的电子器件，以通过包括含氟的第二钝化层来抑制由于光和水分导致的晶体管的特性变化。 构成：源极（S1）和漏极（D1）连接到沟道层（C1）的两端。 栅极（G1）对应于沟道层。 在沟道层和栅极之间形成栅极绝缘层（Gl1）。 第一钝化层（P11，P12）覆盖源极，漏极，栅极和栅极绝缘层以及沟道层。 第二钝化层形成在第一钝化层上并且包括氟。

公开(公告)号：KR1020110065859A

公开(公告)日：2011-06-16

申请号：KR1020090122539

申请日：2009-12-10

Applicant: 삼성전자주식회사

Inventor： 김선일 ,  김창정 ,  전상훈 ,  송이헌 ,  박재철

IPC: G06F3/042

CPC classification number: G06F3/0412 ,  G06F3/0386 ,  G06F3/042 ,  G06F3/043

Abstract: PURPOSE: An optical touch panel and a driving method thereof are provided to easily control a large display device with a simple light source device by constituting an optical sensing area with a light sensitive transparent oxide transistor. CONSTITUTION: An optical touch panel(10) comprises optical sensing areas(11s) sensing incident light. The optical sensing areas are formed into one body with pixels(11p) within a display panel or are formed above surface of the display panel. A light sensitive transparent oxide transistor is used as an optical sensor of the optical sensing areas. The light sensitive transparent oxide transistor comprises a gate electrode, a gate insulation film, a light sensitive transparent oxide semiconductor layer, and a source/drain electrode.

Abstract translation: 目的：提供一种光学触摸面板及其驱动方法，通过用光敏透明氧化物晶体管构成光学感测区域，通过简单的光源装置容易地控制大型显示装置。 构成：光学触摸面板（10）包括感测入射光的光学感测区域（11s）。 光学感测区域与显示面板内的像素（11p）形成一体，或者形成在显示面板的表面上方。 光敏透明氧化物晶体管用作光学感测区域的光学传感器。 光敏透明氧化物晶体管包括栅电极，栅极绝缘膜，光敏透明氧化物半导体层和源极/漏极。

公开(公告)号：KR1020110052939A

公开(公告)日：2011-05-19

申请号：KR1020090109692

申请日：2009-11-13

Applicant: 삼성전자주식회사

Inventor： 김상욱 ,  김창정 ,  박재철 ,  김선일

IPC: H01L29/786 ,  G02F1/1333

CPC classification number: H01L29/7869 ,  H01L29/78696 ,  H01L27/1225 ,  H01L29/26

Abstract: PURPOSE: A transistor, a manufacturing method thereof, and an electrode device including the same are provided to improve the reliability of a flat panel display device by including the transistor which suppresses the change of a property due to light. CONSTITUTION: A gate(G1) is formed on a substrate(SUB1). A gate insulation layer(Gl1) is formed on the substrate to cover the gate. A channel layer(C1) is formed on the gate insulation layer and is made of oxide with In and Zn and a first element. A source(S1) and a drain(D1) are connected to both sides of the channel layer.

Abstract translation: 目的：提供晶体管及其制造方法以及包括该晶体管的电极器件，以通过包括抑制由于光引起的特性变化的晶体管来提高平板显示装置的可靠性。 构成：在基板（SUB1）上形成栅极（G1）。 在基板上形成栅极绝缘层（Gl1）以覆盖栅极。 沟道层（C1）形成在栅极绝缘层上，并由In和Zn和第一元素的氧化物构成。 源极（S1）和漏极（D1）连接到沟道层的两侧。

公开(公告)号：KR1020110050926A

公开(公告)日：2011-05-17

申请号：KR1020090107517

申请日：2009-11-09

Applicant: 삼성전자주식회사

Inventor： 김선일 ,  김상욱 ,  박재철 ,  김창정

IPC: H01L29/786

CPC classification number: H01L29/78696 ,  H01L29/7869 ,  H01L29/06

Abstract: PURPOSE: A transistor, a manufacturing method thereof, and an electronic device including the same are provided to prevent the change of a property due to a residual charge trap generated in a channel layer due to light by suppressing a trap site through an oxygen rich layer. CONSTITUTION: A gate insulation layer(GI1) covering a gate(G1) is formed on a substrate(SUB1). A channel layer(C1) with a multi layer is formed on the gate insulation layer. The channel layer includes a first oxide layer(R1) and a second oxide layer(P1). A source electrode(S1) and a drain electrode(D1) connected to both sides of the channel layer are formed on the gate insulation layer. A passivation layer(PS1) is formed on the gate insulation layer to cover the channel layer, the source electrode, and the drain electrode.

Abstract translation: 目的：提供一种晶体管及其制造方法以及包括该晶体管的电子器件，以防止由于通过富氧层抑制捕获部位而引起的光在通道层中产生的残留电荷陷阱而引起的特性变化 。 构成：在基板（SUB1）上形成覆盖栅极（G1）的栅极绝缘层（GI1）。 在栅极绝缘层上形成具有多层的沟道层（C1）。 沟道层包括第一氧化物层（R1）和第二氧化物层（P1）。 在栅绝缘层上形成与沟道层两侧连接的源电极（S1）和漏电极（D1）。 在栅绝缘层上形成钝化层（PS1），以覆盖沟道层，源电极和漏电极。

公开(公告)号：KR1020090084236A

公开(公告)日：2009-08-05

申请号：KR1020080010291

申请日：2008-01-31

Applicant: 삼성전자주식회사 ,  성균관대학교산학협력단

Inventor： 박재철 ,  권기원 ,  김창정 ,  김상욱 ,  김선일

IPC: G11C7/00 ,  G11C8/10

CPC classification number: G11C5/025 ,  G11C8/10

Abstract: A memory chip array is provided to reduce the whole size by arranging a circuit related to column operation such as a sense amplifier and a column decoder. A memory chip array comprises a plurality of cell arrays(20) and a row decoder. The row decoder comprises a low select(22) and a pre-decoder(21), and the low select is formed in one-side of each cell array. A plurality of cell arrays are connected to pre-decoder in common, and the sense amplifier and the column decoder(23) are formed in the lower-part of each cell array.

Abstract translation: 提供存储器芯片阵列以通过布置与诸如读出放大器和列解码器的列操作相关的电路来减小整体尺寸。 存储芯片阵列包括多个单元阵列（20）和行解码器。 行解码器包括低选择（22）和预解码器（21），并且低选择形成在每个单元阵列的一侧。 多个单元阵列共同连接到预解码器，并且读出放大器和列解码器（23）形成在每个单元阵列的下部。

公开(公告)号：KR1020090048186A

公开(公告)日：2009-05-13

申请号：KR1020070114456

申请日：2007-11-09

Applicant: 삼성전자주식회사

Inventor： 백찬욱 ,  홍석우 ,  김종석 ,  전성찬 ,  김선일

IPC: H01L21/302

CPC classification number: H03B28/00 ,  B44C1/227 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H01L2924/00

Abstract: 제1 기판의 어느 한 면에 제1 마스크 패턴을 형성하는 단계; 상기 제1 마스트 패턴을 식각 마스크로 하여 상기 제1 기판을 식각하여 홀을 형성하는 단계; 제2 기판의 어느 한 면에 제2 마스크 패턴을 형성하는 단계; 상기 제2 마스크 패턴을 식각 마스크로 하여 상기 제2 기판을 미리 설정된 깊이만큼 식각하여 홀을 형성하는 단계; 상기 제1 기판의 식각된 면이 상기 제2 기판의 식각된 면에 접합되도록 상기 제1 기판 및 상기 제2 기판을 접합하는 단계; 상기 제2 기판에 제3 마스크 패턴을 형성하는 단계; 및 상기 제3 마스크 패턴을 식각 마스크로 하여 상기 제2 기판을 식각하여, 상기 제2 기판을 관통하는 홀을 형성하는 단계를 포함하는 다단계 기판 식각 방법이 개시된다. 본 발명의 일 실시예에 따른 다단계 기판 식각 방법을 사용하면, 식각 후 바닥면에 곡률 반경이 생기거나 단차면에서 오버행(overhang) 구조가 생성되는 것을 방지할 수 있어 식각 품질을 개선할 수 있고, 각 기판에 위치한 얼라인 키를 사용하여 기판을 정교하게 접합할 수 있으며, 다층(multi-layer) 공정이 가능한 이점이 있다.
식각, 발진기, 테라헤르츠, 공융

公开(公告)号：KR1020090022186A

公开(公告)日：2009-03-04

申请号：KR1020070087307

申请日：2007-08-29

Applicant: 삼성전자주식회사

Inventor： 김선일 ,  이재철 ,  송이헌 ,  박영수 ,  김창정 ,  박재철

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02581 ,  H01L29/78696

Abstract: An oxide thin film transistor and a manufacturing method thereof are provided to improve electrical characteristic by forming a capping layer with high work function in a channel region. A channel(14) and a capping layer(15) with a work function higher than the channel are consecutively formed in the position corresponding to a gate(12). A gate insulator(13) is formed between the gate and the channel. A source(16a) and a drain(16b) are formed while contacting two parts of the capping layer. A passivation layer is formed by coating the insulating material on the capping layer. The channel is made of the In-Zn oxide coated with Ni.

Abstract translation: 提供一种氧化物薄膜晶体管及其制造方法，通过在沟道区域形成具有高功函数的覆盖层来提高电气特性。 具有比通道高的功函数的通道（14）和盖层（15）在对应于门（12）的位置处连续地形成。 栅极绝缘体（13）形成在栅极和沟道之间。 形成源极（16a）和漏极（16b），同时接触覆盖层的两个部分。 通过在绝缘层上涂覆绝缘材料形成钝化层。 该通道由镀Ni的In-Zn氧化物制成。

公开(公告)号：KR1020090011222A

公开(公告)日：2009-02-02

申请号：KR1020070074593

申请日：2007-07-25

Applicant: 삼성전자주식회사

Inventor： 백찬욱 ,  김종석 ,  전성찬 ,  김선일 ,  김종민 ,  전찬봉 ,  이상훈

IPC: H01L21/306

CPC classification number: H01P11/003 ,  Y10T428/24802

Abstract: A method for etching multi-stage substrate and a terahertz radiation source using the same are provided to improve etching quality by minimizing a radius of curvature of an edge. A oxide film(310) is formed on a first substrate(300). A photoresist coating is formed on one surface of the first substrate. An align key pattern(330) is formed on a photoresist coated surface. A first mask pattern is formed on an opposite surface of the photoresist coated surface. A hole is formed by etching the first substrate with the first mask pattern as an etching mask. A second substrate(350) is contacted with the first substrate. A second mask pattern is formed on the second substrate. A hole is formed by etching the second substrate with the second mask pattern as an etching mask. An oxide film having etching selection ratio between the first substrate and the second substrate is removed.

Abstract translation: 提供了使用其蚀刻多级衬底和太赫兹辐射源的方法，以通过使边缘的曲率半径最小化来提高蚀刻质量。 氧化膜（310）形成在第一基板（300）上。 在第一基板的一个表面上形成光刻胶涂层。 在光致抗蚀剂涂覆的表面上形成对准键图案（330）。 在光致抗蚀剂涂覆表面的相对表面上形成第一掩模图案。 通过用第一掩模图案作为蚀刻掩模蚀刻第一基板来形成孔。 第二基板（350）与第一基板接触。 在第二基板上形成第二掩模图案。 通过用第二掩模图案蚀刻第二衬底作为蚀刻掩模形成孔。 除去具有第一基板和第二基板之间的蚀刻选择比的氧化物膜。

公开(公告)号：KR1020080065867A

公开(公告)日：2008-07-15

申请号：KR1020070003069

申请日：2007-01-10

Applicant: 삼성전자주식회사

Inventor： 송병권 ,  차승남 ,  김선일 ,  강호석 ,  진용완 ,  배민종

IPC: H01J1/30 ,  G02F1/13357 ,  C01B31/02

CPC classification number: H01J31/127 ,  G02F1/133604 ,  G02F2001/133607 ,  G02F2001/133625 ,  H01J29/08 ,  H01J61/025 ,  H01J63/06 ,  H01J1/30 ,  H01J2201/30469

Abstract: An anode panel of a field emission type backlight unit and the field emission type backlight unit having the same are provided to improve luminance by increasing light utilization efficiency. An anode electrode(123) is formed on a lower surface of a substrate(121). A fluorescent substance layer(126) is applied to a lower surface of the anode electrode. A transparent cover(127) and a liquid pack(129) are prepared on an upper surface of the substrate. The transparent cover has lens-shaped curved units(127a). The liquid pack includes a transparent liquid filled in the curved units. The substrate is a transparent substrate. The anode electrode is made of a transparent conductive material. The anode electrode is made of ITO(Indium Tin Oxide). The transparent cover is made of synthetic resins. Spaces in the curved units are communicated with each other so that the transparent liquid circulates through the transparent cover. The transparent liquid is water or transparent oil.

Abstract translation: 提供场发射型背光单元的阳极面板和具有该阳极面板的场发射型背光单元，以通过提高光利用效率来提高亮度。 在基板（121）的下表面上形成阳极电极（123）。 将荧光物质层（126）施加到阳极电极的下表面。 在基板的上表面上制备透明盖（127）和液体包（129）。 透明盖具有透镜状弯曲单元（127a）。 液体包装包括填充在弯曲单元中的透明液体。 基板是透明基板。 阳极由透明导电材料制成。 阳极由ITO（氧化铟锡）制成。 透明盖由合成树脂制成。 弯曲单元中的空间彼此连通，使得透明液体通过透明盖板循环。 透明液体是水或透明油。