Abstract:
PROBLEM TO BE SOLVED: To provide a device and a method of bringing about an improved mutual connection element and a tip end structure body for carrying out pressure connection between terminals of electronic parts. SOLUTION: The tip end structure body has a sharp blade, and this blade is arranged so that the length of the blade will become substantially in parallel with a horizontal movement direction of the tip end structural body when the tip end structure body bends and crosses the terminals of the electronic parts. In this way, the sharp blade arranged substantially in parallel clearly cuts in through a certain non-conductive layer (singular number or multiples), and brings about sure electric connection between the interconnetion element and the terminals of the electronic parts. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To enable the tip of a probe element to be oriented without changing the direction of a probe card. SOLUTION: A probe card assembly (500) comprises a probe card (502), a space converter (506) equipped with a contact structure (probe element) (524), and an interposer (504) interposed in between the space converter (506) and the probe card (502). The space converter (506) and the interposer (504) are stacked up, and mechanisms (532), (536), (538), and (546) suitable for adjusting the orientation of the space converter (506) are provided. A probe can be easily made to bear against many large sites on a semiconductor wafer (508) through the above technique, and the probe elements (524) can be arranged so as to optimize probing of the wafer (508) as a whole. COPYRIGHT: (C)2003,JPO
Abstract:
PROBLEM TO BE SOLVED: To directly fit elastic contact structure (430) to connection pads (310) on semiconductor dies (402a and 402b), before the semiconductor dies (402a and 402b) are made into single bodies (separated) from a semiconductor wafer. SOLUTION: A circuit board (710), having a plurality of terminals (712) arranged on the surface of the semiconductor die or an object similar to the board, is connected to the semiconductor dies (702 and 704). Thus, the semiconductor dies (402a and 402b) can be trained (tested and/or burnt in). The semiconductor dies (402a and 402b) are formed into the single bodies from the semiconductor wafer, and the same elastic contact structure (430) can be used for performing mutual connection between the semiconductor dies and the other electronic element (such as wiring boards and semiconductor packages). When the metal compound mutual interconnecting element (430) is used as the elastic contact structure, burn-in (792) is conducted at a temperature of 150 deg.C and it is completed in a time which is shorter than 60 minutes.
Abstract:
PROBLEM TO BE SOLVED: To form a hyperfine small-sized spring contact element on a semiconductor device. SOLUTION: A mask layer 220 is formed on the surface of a substrate 202 like an electronic component. An aperture is formed on the mask layer. Conductive trace of a seed layer 250 is deposited on the mask layer and in the aperture, and a block of conductive material is constituted on the trace. Consequently, a hyperfine electronic contact structure 260 is defined lithographically and manufactured. The side wall of the aperture is tapered. The conductive trace can be patterned by depositing material via a stencil or a shadow mask. A protruding fixture 230 can be so arranged on the mask layer that a tip 264 of the contact structure obtains topology. All of the constituents are constituted as a group, and a plurality of elastic contact structure bodies which are positioned precisely can be formed.
Abstract:
PROBLEM TO BE SOLVED: To enable orientation of a tip of a probe element without changing the position of a probe card. SOLUTION: A probe card assembly 500 includes: a probe card 502; a space converter having a contact structure (probe element) 524, which is a space converter 506; and an interposer 504 disposed between the space converter and the probe card. Mechanisms 532, 536, 538, 546 are disclosed, which are suitable for determining the degree of adjustment by "stacking" the space converter and the interposer, and by adjusting orientation of the space converter. A probe is allowed to abut on many die sites on a semiconductor wafer 508 easily by using the disclosed technique, and the probe element can be arrayed to optimize probe abutment on the whole wafer. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a test assembly (2000) for testing product circuitry (202, 302, 304) of a product die (2011, 300). SOLUTION: The test assembly includes a test die (2010, 400) and an interconnection substrate (2008) for electrically coupling the test die to a host controller (2002). The test die may be designed, in accordance with a design methodology (100) for a test die and a product die that includes the step of concurrently designing test circuitry (202A, 402, 404) and product circuitry in a unified design (102). The test circuitry can be designed, to provide a high degree of fault detection range for the corresponding product circuitry generally, substantially without relating to the amount of silicon region that is required by the test circuitry. The design methodology then partitions the unified design into the test die and the product die (104). The test die includes the test circuitry, and the product die includes the product circuitry. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a method to enable the tip of a probe element to be oriented without changing the position of a probe card. SOLUTION: A probe card assembly 500 comprises a probe card 502 and a space converter 506. The space converter 506 is equipped with the probe element 524. An interposer 504 is interposed in between the space converter 506 and the probe card 502. The space converter 506 and the interposer 504 are stacked up. The orientation of the space converter 506 is adjusted by an actuator. Thus, the probe elements 524 can be arranged so as to optimize probing of the wafer 508 as a whole. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a technique for performing a wafer-level burn-in and test. SOLUTION: The technique includes a test substrate 108 having active electronic components 106 and metallic spring contact elements 110 for connections with a plurality of devices-under-test (DUTs) 102 on a wafer-under-test 104. The test substrate 108 receives a plurality of signals for testing the DUTs 102 over relatively few signal lines from a host controller 116 and transmits these signals over relatively many interconnections between the test substrate 108 and the DUTs 102. COPYRIGHT: (C)2003,JPO
Abstract:
PROBLEM TO BE SOLVED: To make improvements in an interconnection between microelectronic components by a method wherein a flexible extension element is mounted on a contact region on the electronic component and so formed as to be elastic. SOLUTION: A wire 502 is wrapped up in or covered with a first inner coating layer 520, and the first inner coating layer 520 is coated with a second outer coating layer 522 for the formation of a wire stem 530. The first layer 520 of the wire stem 530 is made to cover a terminal 512 as a contacting region on a semiconductor substrate 508 where the end 502a of the wire 502 is bonded, and the wire 502 of soft gold material is mounted and fixed to the terminal 512. By this setup, improvements can be made in an interconnection between microelectronic components.
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor package assembly which comprises an improved contact structure. SOLUTION: In a semiconductor package assembly 611, a board 612 which comprises conductive contact pads on a first surface and a second surface and which is composed of an insulating material is contained. In addition, a plurality of semiconductor devices 621 which comprise contact pads faced with the contact pads on the first surface and the second surface of the board 612 are contained. In addition, elastic contact structures 626 by which the contact pads of the semiconductor devices 621 and contact pads held by the board 612 are electrically connected to each other and which are used to support the semiconductor devices in positions at intervals from the surface of the board 612 in such a way that the semiconductor devices 621 exist on a first parallel plane and a second parallel plane on both sides of the board 612 are contained. In addition, contact means 616 which are held by the board 612 and which form elastic contacts with the semiconductor devices 621 via the contact structures 626 are contained.