公开(公告)号：GB2521353A

公开(公告)日：2015-06-24

申请号：GB201322245

申请日：2013-12-17

Applicant: IBM

Inventor： RIEL HEIKE E ,  SCHMIDT VOLKER

IPC: H01L35/02 ,  H01L35/04 ,  H01L35/28

Abstract: A thermoelectric device 1 for transferring heat from a heat source 2 to a heat sink 3 comprises at least one thermoelectric leg pair 10 having a first leg 4 including an n-type semiconductor material and a second leg 5 including a p-type semiconductor material, the first leg 4 and the second leg 5 are electrically coupled in series and a resistive element 9 electrically couples the first leg 4 and the second leg 5 between the heat source 2 and the heat sink 3. Wherein the at least one resistive element 9 may be adapted to at least partially bypass an electric current through a junction 11 between the first leg 4 and the second leg 5. Wherein the at least one resistive element 9 may be arranged between the first leg 4 and the second leg 5 such that a Joule heating of the legs 4,5 is concentrated towards the side of the heat sink 3.

公开(公告)号：GB2485495B

公开(公告)日：2013-10-30

申请号：GB201200880

申请日：2010-08-30

Applicant: IBM

Inventor： BJOERK MIKAEL T ,  KARG SIEGFRIED FRIEDRICH ,  KNOCH JOACHIM ,  RIEL HEIKE E ,  RIESS WALTER H ,  SOLOMON PAUL M

IPC: H01L29/739 ,  H01L29/06

Abstract: An indirectly induced tunnel emitter for a tunneling field effect transistor (TFET) structure includes an outer sheath that at least partially surrounds an elongated core element, the elongated core element formed from a first semiconductor material; an insulator layer disposed between the outer sheath and the core element; the outer sheath disposed at a location corresponding to a source region of the TFET structure; and a source contact that shorts the outer sheath to the core element; wherein the outer sheath is configured to introduce a carrier concentration in the source region of the core element sufficient for tunneling into a channel region of the TFET structure during an on state.

公开(公告)号：DE112013004345T5

公开(公告)日：2015-05-28

申请号：DE112013004345

申请日：2013-10-31

Applicant: IBM

Inventor： CZORNOMAZ LUKAS ,  HOFRICHTER JENS ,  RICHTER MIRJA ,  RIEL HEIKE E

IPC: G02B6/12

Abstract: Die vorliegende Erfindung bezieht sich auf eine Halbleiter-Einheit (1) zur Verwendung in wenigstens einer optischen Anwendung, die aufweist: wenigstens einen optisch passiven Aspekt (2), der in im Wesentlichen einem optisch passiven Modus betreibbar ist, und wenigstens ein optisch aktives Material (3), das wenigstens ein Material aufweist, das in im Wesentlichen einem optisch aktiven Modus betreibbar ist, wobei: der optisch passive Aspekt (2) des Weiteren wenigstens eine kristalline Kristallkeimschicht (4) aufweist, das optisch aktive Material (3) epitaxial in wenigstens einer vordefinierten Struktur (5) aufgewachsen ist, die in dem optisch passiven Aspekt (2) bereitgestellt ist, die sich bis wenigstens zu einer Oberseite (4') der kristallinen Kristallkeimschicht (4) erstreckt, und der optisch passive Aspekt (2) so strukturiert ist, dass er wenigstens eine passive photonische Struktur (6) aufweist, wobei die kristalline Kristallkeimschicht (4) einen kristallinen Wafer aufweist und wobei das optisch aktive Material (3) wenigstens eines aufweist von: einem III-V-Material und einem II-VI-Material.

公开(公告)号：GB2518679A

公开(公告)日：2015-04-01

申请号：GB201317265

申请日：2013-09-30

Applicant: IBM

Inventor： MOSELUND KIRSTEN EMILIE ,  RIEL HEIKE E

IPC: H01L29/73

Abstract: A tunneling field effect transistor device 1 has first and second semiconductor contact regions 2a, 2b; separated by a semiconductor channel region 3. The device includes a channel gate 4 overlying the channel region 3, and first and second doping gates 5a, 5b; overlying the first and second contact regions respectively. The arrangement is such that application of a positive voltage level at the first doping gate 2a, and a negative voltage level at the second doping gate 2b, produces a TFET with an n-type first contact region and a p-type second contact region, and reversing the voltage levels at the doping gates produces a TFET with a p-type first contact region and an n-type second contact region, whereby the device is adapted for dynamically-reconfigurable bidirectional operation by electrostatic doping. Such TFET devices may be used to implement pass gates such as the access transistors in SRAM cells.

公开(公告)号：GB2508376A

公开(公告)日：2014-06-04

申请号：GB201221502

申请日：2012-11-29

Applicant: IBM

Inventor： GOTSMANN BERND W ,  KARG FRIEDRICH SIEGFRIED ,  LOERTSCHER EMANUEL ,  RIEL HEIKE E ,  SIGNORELLO GIORGIO

IPC: G01J3/02 ,  B82Y20/00 ,  G01J3/12 ,  H01L31/0352 ,  H01L31/105

Abstract: An optical spectrometer 1 comprises a photodiode 2 and a straining mechanism 4 for imposing adjustable strain on the photodiode. The spectrometer l includes measurement apparatus 7 for measuring variation of photocurrent with strain at different values of the adjustable strain imposed by the straining mechanism 4. Adjusting the strain allows adjustment of the band gap Eg of the photosensitive region of the photodiode 1, and this determines the cut-off energy for absorption of photons. Measuring variation of photocurrent with strain at different values of the adjustable strain imposed by the straining mechanism allows study of photons within a desired energy range of the band gap energy corresponding to each strain value. The photodiode 2 may comprise a PIN photodiode formed in a nanowire as a radial or axial heterostructure. A polarizer 6 may be adapted to transmit a predetermined polarized component of incident light to the photodiode. The polarizer 6 may comprise a coating on the photodiode.

公开(公告)号：GB2500831A

公开(公告)日：2013-10-02

申请号：GB201310312

申请日：2011-11-02

Applicant: IBM

Inventor： GOTSMANN BERND W ,  KARG SIEGFRIED FRIEDRICH ,  RIEL HEIKE E

IPC: H01L29/423 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: Nanowire devices (7, 14, 25, 38, 40) are provided together with methods for forming such devices. The methods comprise forming a stressor layer (6, 13, 23, 33) circumferentially surrounding a semiconductor nanowire (1, 10, 20, 30). The methods are performed such that, due to the stressor layer, the nanowire is subjected to at least one of radial and longitudinal strain to enhance carrier mobility in the nanowire. Radial and longitudinal strain components can be used separately or together and can each be made tensile or compressive, allowing formulation of desired strain characteristics for enhanced conductivity in the nanowire of a given device.

公开(公告)号：DE112011103806T5

公开(公告)日：2013-08-08

申请号：DE112011103806

申请日：2011-11-02

Applicant: IBM

Inventor： GOTSMANN BERND W ,  KARG SIEGFRIED FRIEDRICH ,  RIEL HEIKE E

IPC: H01L29/66 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/06 ,  H01L29/10 ,  H01L29/775

Abstract: Es werden Nanodrahteinheiten (7, 14, 25, 38, 40) zusammen mit Verfahren zum Bilden solcher Einheiten bereitgestellt. Die Verfahren weisen das Bilden einer Stressorschicht (6, 13, 23, 33) auf, die einen Halbleiter-Nanodraht (1, 10, 20, 30) außen umgibt. Die Verfahren werden so durchgeführt, dass der Nanodraht aufgrund der Stressorschicht einer radialen und/oder longitudinalen Spannung ausgesetzt wird, um die Beweglichkeit der Ladungsträger in dem Nanodraht zu erhöhen. Die radiale und longitudinale Spannungskomponente können einzeln oder zusammen genutzt werden, und jede kann als Zug- oder Druckspannung erzeugt werden, sodass gewünschte Spannungseigenschaften für eine erhöhe Leitfähigkeit in dem Nanodraht einer bestimmten Einheit definiert werden können.

公开(公告)号：GB2494565A

公开(公告)日：2013-03-13

申请号：GB201221842

申请日：2011-05-23

Applicant: IBM

Inventor： RIEL HEIKE E ,  SCHMID HEINZ ,  BJOERK MIKAEL T

IPC: C30B11/10 ,  C30B11/12 ,  C30B13/18 ,  C30B15/08 ,  H01L31/18

Abstract: A method for producing a mono-crystalline sheet (11), in particular a silicon sheet (11), comprises: providing at least two aperture elements (1, 2) forming a gap (3) in-between; providing a molten alloy (4) comprising silicon in the gap (3) between said at least two aperture elements (1, 2); providing a gaseous precursor medium (5) comprising silicon in the vicinity of the molten alloy (4); providing a silicon nucleation crystal (6) in the vicinity of the molten alloy (4); and bringing in contact said silicon nucleation crystal (6) and the molten alloy (4). A device (10, 20) for producing a mono-crystalline sheet (11), in particular a silicon sheet (11), comprises at least two aperture elements (1, 2) at a predetermined distance (D) from each other thereby forming a gap (3), and being adapted to be heated for holding a molten alloy (4) comprising silicon by surface tension in the gap (3) between the aperture elements (1,2 ); a means (15) for supplying a gaseous precursor medium (5) comprising silicon in the vicinity of the molten alloy (4); and a positioning means (16) for holding and moving a nucleation crystal (6) in the vicinity of the molten alloy (2).

公开(公告)号：CA2819469A1

公开(公告)日：2012-05-24

申请号：CA2819469

申请日：2011-11-02

Applicant: IBM

Inventor： GOTSMANN BERND W ,  KARG SIEGFRIED FRIEDRICH ,  RIEL HEIKE E

IPC: H01L29/66 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/06 ,  H01L29/10 ,  H01L29/775

Abstract: Nanowire devices (7, 14, 25, 38, 40) are provided together with methods for forming such devices. The methods comprise forming a stressor layer (6, 13, 23, 33) circumferentially surrounding a semiconductor nanowire (1, 10, 20, 30). The methods are performed such that, due to the stressor layer, the nanowire is subjected to at least one of radial and longitudinal strain to enhance carrier mobility in the nanowire. Radial and longitudinal strain components can be used separately or together and can each be made tensile or compressive, allowing formulation of desired strain characteristics for enhanced conductivity in the nanowire of a given device.

公开(公告)号：GB2485495A

公开(公告)日：2012-05-16

申请号：GB201200880

申请日：2010-08-30

Applicant: IBM

Inventor： BJOERK MIKAEL T ,  KARG SIEGFRIED F ,  KNOCH JOACHIM ,  RIEL HEIKE E ,  RIESS WALTER H ,  SOLOMON PAUL M

IPC: H01L29/739 ,  H01L29/06

Abstract: An indirectly induced tunnel emitter for a tunneling field effect transistor (TFET) structure includes an outer sheath that at least partially surrounds an elongated core element, the elongated core element formed from a first semiconductor material; an insulator layer disposed between the outer sheath and the core element; the outer sheath disposed at a location corresponding to a source region of the TFET structure; and a source contact that shorts the outer sheath to the core element; wherein the outer sheath is configured to introduce a carrier concentration in the source region of the core element sufficient for tunneling into a channel region of the TFET structure during an on state.