公开(公告)号：US06472235B1

公开(公告)日：2002-10-29

申请号：US09886881

申请日：2001-06-21

Applicant: Kuang-Peng Lin ,  Hung-Jen Tsai ,  Hsien-Tsong Liu

Inventor： Kuang-Peng Lin ,  Hung-Jen Tsai ,  Hsien-Tsong Liu

IPC: H01L2166

CPC classification number: B81C99/0035 ,  B81C1/00611 ,  B81C2201/0126 ,  Y10S438/959

Abstract: A method and an apparatus for preparing a backside-ground wafer for testing are described. The method includes the steps of first providing a calibration wafer that has a pattern formed on a top surface of an insulating material such as oxide or nitride. Three droplets of water are applied with each droplet sufficiently apart from the other droplets on the top surface of the calibration wafer. A backside-ground wafer that has a ground backside and a front side to be tested is then mated to the calibration wafer by mating the ground backside to the top surface of the calibration wafer with water droplets therein-between forming a bond by capillary reaction in-between the oxide pattern on the calibration wafer. The apparatus for mounting a backside-ground wafer to a calibration wafer consists of a slanted block having a top surface with a slant angle between about 10° and about 30°.

Abstract translation: 描述了用于制备用于测试的背面晶片的方法和装置。 该方法包括以下步骤：首先提供具有形成在诸如氧化物或氮化物的绝缘材料的顶表面上的图案的校准晶片。 每个液滴与校准晶片的顶表面上的其它液滴充分分开地施加三滴水。 将具有接地背面和待测试的前侧的背面晶片然后通过将地面背面与校准晶片的顶表面配合而与校准晶片配合，并通过毛细管反应形成键 - 在校准晶片上的氧化物图案之间。 用于将背面晶片安装到校准晶片的装置包括具有在大约10°至大约30°之间的倾斜角的顶表面的倾斜块。

公开(公告)号：EP3094592A1

公开(公告)日：2016-11-23

申请号：EP14800066.4

申请日：2014-11-20

Applicant: Robert Bosch GmbH

Inventor： LUTZ, Theresa ,  HEUCK, Friedjof

IPC: B81C1/00

CPC classification number: B81C1/00595 ,  B81C1/00611 ,  B81C2201/0126 ,  B81C2201/0132 ,  B81C2201/0133

Abstract: The invention relates to a production method for a micromechanical part, comprising at least the following steps: forming a main structure (10) of at least one component of the micromechanical part from at least one crystalline layer (12) of a substrate by means of a crystal orientation-independent etching step, and etching at least one area (18) in a defined crystal plane (20) away on the main structure (10) of the at least one component by means of a crystal orientation-dependent etching step. For said crystal orientation-dependent etching step, the defined crystal plane (20) in respect of which the at least one area (18) etched away on the main structure (10) is oriented is the crystal plane that features the lowest etching rate of all crystal planes. The invention further relates to a micromechanical part.

公开(公告)号：EP2852644A4

公开(公告)日：2016-04-06

申请号：EP13794728

申请日：2013-05-21

Applicant: BASF SE

Inventor： NOLLER BASTIAN MARTEN ,  GILLOT CHRISTOPHE ,  FRANZ DIANA ,  LI YUZHUO

IPC: H01L21/306 ,  C09G1/02

CPC classification number: C09G1/02 ,  B81C2201/0121 ,  B81C2201/0123 ,  B81C2201/0126 ,  H01L21/02024 ,  H01L21/302 ,  H01L21/304 ,  H01L21/30625 ,  H01L21/3212 ,  H01L21/461

公开(公告)号：JP4528124B2

公开(公告)日：2010-08-18

申请号：JP2004538829

申请日：2003-08-22

Applicant: フラウンホファー ゲセルシャフト ツール フェールデルンク ダー アンゲヴァンテン フォルシュンク エー.ファオ.

Inventor： クエンザー，ハンス−ヨアヒム ,  シュルツ，アルネ，ヴァイト ,  メルツ，ピーター

IPC: B81C99/00 ,  H01L23/02 ,  B81C1/00 ,  C03B19/02 ,  C03B23/02 ,  H01L21/02 ,  H01L23/14

CPC classification number: B81C1/00611 ,  B81C2201/0126 ,  C03B19/02 ,  C03B23/02

公开(公告)号：JP4960965B2

公开(公告)日：2012-06-27

申请号：JP2008534810

申请日：2005-10-10

Applicant: シルバーブルック リサーチ ピーティワイ リミテッド

Inventor： キア シルバーブルック，

IPC: B41J2/16 ,  B41J2/05 ,  B81C1/00

CPC classification number: B41J2/1404 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2002/14403 ,  B41J2002/14475 ,  B41J2202/11 ,  B81B2201/032 ,  B81B2201/052 ,  B81B2203/0109 ,  B81C1/00611 ,  B81C2201/0108 ,  B81C2201/0126

公开(公告)号：JP2011129940A

公开(公告)日：2011-06-30

申请号：JP2011010801

申请日：2011-01-21

Applicant: Avantor Performance Materials Inc ,  アバンター・パフォーマンス・マテリアルズ・インコーポレイテッドAvantor Performance Materials, Inc.

Inventor： KIM SANG IN ,  HONG SEONG JIN

IPC: H01L21/308 ,  H01L21/20 ,  H01L21/306 ,  H01L31/04

CPC classification number: B81C1/00611 ,  B81C2201/0126 ,  C09K13/02 ,  H01L21/32134 ,  H01L29/6675

Abstract: PROBLEM TO BE SOLVED: To reduce or essentially remove a salient or a protrusion which generally extends upward from an almost plane surface of a polysilicon film that is formed by low-temperature poly Si (LTPS) annealing of an amorphous silicon film deposited on a substrate.
SOLUTION: A flattening solution which is highly aqueous and strongly basic has a pH of 12 or higher and contains water, at least one kind of a strong base, and at least one kind of an etching speed control agent. The method of use thereof includes a process which makes the almost plane surface of polysilicon film contact with the solution which is highly aqueous and strongly basic for a sufficient time to make etching selectively the salient or the protrusion from the surface of the almost plane polysilicon film without etching significantly the almost plane polysilicon film.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：为了减少或基本上去除通常由沉积的非晶硅膜的低温多晶硅（LTPS）退火形成的多晶硅膜的几乎平面表面向上延伸的突出或突起， 在基板上。 解决方案：高水性和强碱性的平坦化溶液的pH为12以上，并且含有水，至少一种强碱和至少一种蚀刻速度控制剂。 其使用方法包括使多晶硅膜的大致平面与高度水溶性且强碱性的溶液接触足够的时间以选择性地从几何平面多晶硅膜的表面突出或突出的方法 没有显着蚀刻几乎平面的多晶硅膜。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：WO2015104086A1

公开(公告)日：2015-07-16

申请号：PCT/EP2014/075131

申请日：2014-11-20

Applicant: ROBERT BOSCH GMBH

Inventor： LUTZ, Theresa ,  HEUCK, Friedjof

IPC: B81C1/00

CPC classification number: B81C1/00595 ,  B81C1/00611 ,  B81C2201/0126 ,  B81C2201/0132 ,  B81C2201/0133

Abstract: Die Erfindung betrifft ein Herstellungsverfahren für ein mikromechanisches Bauteil, das wenigstens die folgenden Schritte umfasst: Herausstrukturieren einer Grundstruktur (10) mindestens einer Komponente des mikromechanischen Bauteils aus zumindest einer kristallinen Schicht (12) eines Substrats mittels eines kristallorientierungs-unabhängigen Ätzschritts, und Herausarbeiten mindestens einer Fläche (18) einer definierten Kristallebene (20) aus der Grundstruktur (10) der mindestens einen Komponente mittels eines kristallorientierungs-abhängigen Ätzschritts, wobei der kristallorientierungs- abhängige Ätzschritt ausgeführt wird, für welchen die jeweilige definierte Kristallebene (20), nach welcher die mindestens eine an der Grundstruktur (10) herausgearbeitete Fläche (18) ausgerichtet wird, von allen Kristallebenen die niedrigste Ätzrate aufweist. Des Weiteren betrifft die Erfindung ein mikromechanisches Bauteil.

Abstract translation: 本发明涉及一种用于微机械部件的制造方法，至少包括以下步骤：除去由晶体取向无关的蚀刻步骤来图案化的基本结构（10）的基板的至少一个晶体层（12）的微机械部件中的至少一个部件，并且工作了至少一个 所述至少一个部件的基底结构（10）的确定的晶体平面（20）的表面（18）由一个晶体取向相关的蚀刻步骤，其中进行的晶体取向相关的蚀刻步骤中，用于所述相应所定义的晶面（20），根据该至少 一个在基本结构（10）计算出表面（18）对齐，有所有晶面的最低的蚀刻速率。 此外，本发明涉及一种微机械部件。

公开(公告)号：WO2007041748A1

公开(公告)日：2007-04-19

申请号：PCT/AU2005/001565

申请日：2005-10-10

Applicant: SILVERBROOK RESEARCH PTY LTD ,  SILVERBROOK, Kia

Inventor： SILVERBROOK, Kia

IPC: B81C1/00 ,  B41J2/05 ,  B41J2/16

CPC classification number: B41J2/1404 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2002/14403 ,  B41J2002/14475 ,  B41J2202/11 ,  B81B2201/032 ,  B81B2201/052 ,  B81B2203/0109 ,  B81C1/00611 ,  B81C2201/0108 ,  B81C2201/0126

Abstract: A method of forming a suspended beam in a MEMS process is disclosed. In the process a pit (8) is etched into a substrate (5). Sacrificial material (10) is deposited in the pit (8) and on the surrounding substrate surface. The sacrificial material (10) is then removed from the surrounding substrate surface and from the periphery of the pit (8) so that there is a gap between the sacrificial material and at least two sidewalls of the pit. The sacrificial material is then heated so that it reftows such that the remaining sacrificial material contacts the sidewalls of the pit. Material for the beam (12), which is typically a metal, is then deposited on the substrate surface and the reflowed sacrificial material, and the sacrificial material is then removed to form the suspended beam. The beam could be used as the heating element in an inkjet printer.

Abstract translation: 公开了一种在MEMS工艺中形成悬挂梁的方法。 在该过程中，凹坑（8）被蚀刻到衬底（5）中。 牺牲材料（10）沉积在凹坑（8）中和周围的基底表面上。 然后将牺牲材料（10）从周围的衬底表面和凹坑（8）的周边移除，使得在牺牲材料和凹坑的至少两个侧壁之间存在间隙。 然后将牺牲材料加热，使得其牺牲使得剩余的牺牲材料接触凹坑的侧壁。 然后将通常为金属的梁（12）的材料沉积在衬底表面和回流牺牲材料上，然后去除牺牲材料以形成悬挂梁。 该光束可用作喷墨打印机中的加热元件。

公开(公告)号：WO2013175396A1

公开(公告)日：2013-11-28

申请号：PCT/IB2013/054169

申请日：2013-05-21

Applicant: BASF SE ,  BASF SCHWEIZ AG ,  BASF (CHINA) COMPANY LIMITED

Inventor： NOLLER, Bastian Marten ,  GILLOT, Christophe ,  FRANZ, Diana

IPC: C09G1/02 ,  H01L21/304 ,  H01L21/306

CPC classification number: C09G1/02 ,  B81C2201/0121 ,  B81C2201/0123 ,  B81C2201/0126 ,  H01L21/02024 ,  H01L21/302 ,  H01L21/304 ,  H01L21/30625 ,  H01L21/3212 ,  H01L21/461

Abstract: A process for the manufacture of semiconductor devices comprising the chemical-mechanical polishing of a substrate or layer containing at least one lll-V material in the presence of a chemical-mechanical polishing composition (Q1) comprising (A) inorganic particles, organic particles, or a mixture or composite thereof, (B) at least one amphiphilic non-ionic surfactant having (b1) at least one hydrophobic group; and (b2) at least one hydrophilic group selected from the group consisting of polyoxyalkylene groups comprising (b22) oxyalkylene monomer units other than oxyethylene monomer units; and (M) an aqueous medium.

Abstract translation: 一种用于制造半导体器件的方法，包括在化学机械抛光组合物（Q1）的存在下对包含至少一种III-V材料的基底或层进行化学机械抛光，所述化学机械抛光组合物包含（A）无机颗粒，有机颗粒， 或其混合物或复合物，（B）至少一种具有（b1）至少一个疏水基团的两亲性非离子表面活性剂; 和（b2）至少一种选自包含（b22）氧化烯单体单元以外的氧化烯单体单元的聚氧化烯基的亲水基团; 和（M）水性介质。

公开(公告)号：WO1997008727A1

公开(公告)日：1997-03-06

申请号：PCT/US1996013333

申请日：1996-08-19

Applicant: FED CORPORATION

Inventor： FED CORPORATION ,  JONES, Gary, W. ,  ZIMMERMAN, Steven, M. ,  JONES, Susan, K., Schwartz ,  COSTA, Michael, J. ,  SILVERNAIL, Jeffrey, A.

IPC: H01J09/02

CPC classification number: B81C1/00611 ,  B81C2201/0126 ,  H01J9/025

Abstract: A planarization method for use during manufacture of a microelectronic field emitter device (50), comprising applying a glass frit slurry including glass particles in a removable base, and subsequently baking to liquify the frit (300). The invention relates in another aspect to a method of making a microelectronic field emitter device, comprising the steps of: applying a patterned layer of liftoff profile resist over a substrate (326) to define emitter conductor locations; employing the patterned resist layer to form trenches (324) in the substrate at the emitter conductor locations; depositing emitter conductor metal in the trenches and over the patterned resist layer; removing the patterned resist layer; depositing a current limiter layer (334) over the conductors (322) and substrate areas between trenches; depositing a layer of emitter material; pattern masking and etching the layer of emitter material to form emitter structures (330); depositing gate dielectric; applying a patterned layer of liftoff profile resist over the gate dielectric; evaporating gate metal; and removing the patterned resist layer to define gate electrodes (332).

Abstract translation: 一种在制造微电子场发射器件（50）期间使用的平面化方法，包括将包含玻璃颗粒的玻璃料浆料涂覆在可移除的基底中，随后烘烤以熔化玻璃料（300）。 本发明在另一方面涉及一种制造微电子场发射器件的方法，包括以下步骤：在衬底（326）上施加图案化的剥离轮廓抗蚀剂层以限定发射极导体位置; 使用图案化的抗蚀剂层在发射极导体位置处在衬底中形成沟槽（324）; 将发射极导体金属沉积在图案化的抗蚀剂层的沟槽中; 去除图案化的抗蚀剂层; 在导体（322）和沟槽之间的衬底区域上沉积限流器层（334）; 沉积一层发射体材料; 图案掩蔽和蚀刻发射极材料层以形成发射体结构（330）; 沉积栅电介质; 在栅极电介质上施加图案化的剥离轮廓抗蚀剂层; 蒸发栅极金属; 并去除图案化的抗蚀剂层以限定栅电极（332）。