公开(公告)号：EP0908840A2

公开(公告)日：1999-04-14

申请号：EP98118640.6

申请日：1998-10-02

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： Alexander, Sam ,  Furey, Lee

IPC: G06K7/10

CPC classification number: G06K19/0723

Abstract: An improved integrated circuit transponder device is presented comprising, in combination, a single, externally wireless package enclosing an integrated circuit semiconductor chip, a coil within the package being selectively exposed to an electromagnetic field, and a detection portion on the integrated circuit semiconductor chip and being coupled to each end of the coil for detecting when voltages at each end of the coil are approximately equal over a period of time. The detection portion includes an exclusive NOR gate coupled to each end of the coil for determining when the coil voltages are equal, and the output of the exclusive NOR gate is input to a filter before being delivered to the remainder of the device circuitry.

Abstract translation: 提出了一种改进的集成电路应答器装置，其组合包括封装集成电路半导体芯片的单个外部无线封装，封装内的线圈选择性地暴露于电磁场，以及集成电路半导体芯片上的检测部分，以及 耦合到线圈的每个端部，用于检测线圈的每个端部处的电压在一段时间内是否近似相等。 检测部分包括耦合到线圈的每一端的异或非门，用于确定线圈电压何时相等，并且异或非门的输出在输送到器件电路的其余部分之前被输入到滤波器。

公开(公告)号：EP0885476A1

公开(公告)日：1998-12-23

申请号：EP97907748.0

申请日：1997-02-21

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： HEWITT, Kent

IPC: G06F1 ,  H02J9 ,  H04L29

CPC classification number: H02J9/005

Abstract: According to the present invention, there is provided an integrated circuit (200) useful in an electronic encoding device having a voltage source (202), a user interface (204a-204d) and a transmitter. In one embodiment the integrated circuit includes a wake-up circuit (206) which generates a signal responsive to an input received from the user interface; power switching logic (208) which provides power from the voltage source to a non-regulated power bus (210) and a voltage regulating circuit (214), the power switching logic being responsive to the signal from the wake-up circuit; a regulated power bus (212) in communication with the voltage regulating circuit; non-volatile memory (220) in communication with the regulated power bus; encoder logic (222) in communication with the regulated power bus, the encoder logic having output logic (224) which provides a signal to the transmitter.

公开(公告)号：EP0884733A2

公开(公告)日：1998-12-16

申请号：EP98304585.7

申请日：1998-06-09

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： Yach, Randy L. ,  Hull, Richard L.

IPC: G11C7/06

CPC classification number: G11C7/067

Abstract: A self timed precharge sense amplifier for allowing high speed reading of a memory cell of a memory array. The self timed precharge sense amplifier uses a precharge device for generating an output voltage which is used to ramp up a voltage level of a column of the memory array where the memory cell is located. State control circuitry is coupled to the precharge device for activating and deactivating the precharge device. A sense amplifier is coupled to the precharge device and to the state control circuitry for monitoring the output voltage of the precharge device and for signalling the state control circuitry to deactivate the precharge device when the output voltage has reached a threshold voltage level set by the sense amplifier which is a minimum amount of voltage required to properly read the memory cell.

Abstract translation: 读出放大器包括用于产生用于使存储器阵列的列的电压电平升高的输出电压的预充电晶体管（54）。 状态控制电路（46）耦合到预充电晶体管以激活和去激活它。 读出放大器（56）耦合到预充电晶体管和状态控制电路。 读出放大器监视预充电晶体管的输出电压，并且当输出电压达到阈值电压电平时，向状态控制电路发出信号以使预充电晶体管去激活。 阈值电平由读出放大器设置，并且是正确读取存储器单元（32）所需的最小电压量。

公开(公告)号：EP0847572A1

公开(公告)日：1998-06-17

申请号：EP97931321.0

申请日：1997-06-26

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： NOLAN, James, B. ,  ELLISON, Scott ,  BOLES, Brian ,  DRAKE, Rodney ,  COOPER, Russell, E.

IPC: G02F1 ,  G06F3 ,  G09G3 ,  H02M3 ,  G09G5

CPC classification number: H02M3/07 ,  G06F3/147 ,  G09G3/006 ,  G09G3/18 ,  G09G3/3696 ,  G09G5/001

Abstract: A microcontroller (50) chip (51) includes a charge pump with a switched-capacitor (83) that develops a plurality of discrete voltages. A switched-capacitor (83) charging circuit selectively charges a capacitor to produce successive charges individually retrievable from the capacitor. An LCD driver (173) selectively transmits the discrete operating voltage levels to activate the LCD (10) according to status of an external system under the control of the microcontroller (50). Voltage losses that may occur during the switched-capacitor (83) charging are compensated to maintain the levels of the discrete operating voltages free of decay. Compensation is achieved by overcharging the capacitor (83) by an amount substantially equivalent to the amount of voltage loss on the capacitor, using active feedback obtained from monitoring the charge on the capacitor.

公开(公告)号：EP0787379A1

公开(公告)日：1997-08-06

申请号：EP96924422.0

申请日：1996-07-17

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： YACH, Randy, L. ,  HULL, Richard, L.

IPC: G11C5 ,  H02H3 ,  H02J1 ,  H03K17

CPC classification number: H03K17/223 ,  G11C5/143 ,  H02H3/243 ,  H03K17/145 ,  H03K17/22

Abstract: A power-on reset circuit (10) for resetting electronic circuitry to be monitored has been provided. The power-on reset circuit includes a trip point generator (12) including the worst case component (the component that requires the greatest power supply voltage to operate) within the electronic circuitry for setting the threshold voltatge for taking the electronic circuitry out of reset such that if the worst case component is operative, it is guaranteed that all components are operative and, thus, the electronic circuitry can be taken out of reset. Moreover, because the threshold voltage is based upon the worst case component of the electronic circuitry, the threshold voltage of the trip point generator will adequately track the electronic circuitry over normal process and temperature variations. Additionally, the power-on reset circuit includes a noise filter (34) for placing the electronic circuitry back into reset if variations within the power supply voltage cause the power supply voltage level to fall below a predetermined threshold for at least a minimum period of time.

公开(公告)号：EP0783755A1

公开(公告)日：1997-07-16

申请号：EP96924423.0

申请日：1996-07-17

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： ALEXANDER, Samuel, E. ,  HEWITT, Kent, D.

IPC: G11C16 ,  G11C7 ,  G11C8

CPC classification number: G11C7/106 ,  G11C7/1039 ,  G11C7/1051 ,  G11C8/04 ,  G11C16/20 ,  G11C16/26

Abstract: A sequential memory device (10) having a read pipeline data structure for reading data from a bitline (32, 33) of a memory array of the device is disclosed. The read pipeline data structure includes at least one data path including a sense amp (40, 40') for sensing the logic level appearing on the bitline (32, 33), and a flip-flop (46, 46') for providing an output signal indicative of the data bits received on the bitline (32, 32'), and means (101) for initializing the data path upon power up of the device such that the first data bit from the memory array is available for output from the device without the need and before the occurrence of a clock signal (CLK).

公开(公告)号：EP2862300B1

公开(公告)日：2019-07-31

申请号：EP13740085.9

申请日：2013-06-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： AKKIHAL, Shivanand, I. ,  MUELLER, Rainer

IPC: H04J3/06 ,  H04N21/43

公开(公告)号：EP3029579A2

公开(公告)日：2016-06-08

申请号：EP15202847.8

申请日：2008-11-21

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： SIMMONS, Michael ,  SCHLUNDER, Howard Henry

IPC: G06F13/10 ,  G06F13/12 ,  G06F13/16

CPC classification number: G06F13/1673 ,  G06F13/128

Abstract: A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.

Abstract translation: 控制器具有接口，缓冲存储器，用于访问缓冲存储器的第一组寄存器，独立于用于访问缓冲存储器的第一组寄存器的第二寄存器组，以及用于解码和执行缓冲存储器访问的控制单元 接口接收的命令通过第一组或第二组寄存器访问缓冲存储器。

公开(公告)号：EP1090425B1

公开(公告)日：2012-06-27

申请号：EP00918141.3

申请日：2000-03-17

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： GERBER, Donald, S. ,  YACH, Randy, L. ,  HEWITT, Kent, D. ,  SPADINI, Gianpaolo

IPC: H01L27/115 ,  H01L21/8247 ,  G11C16/04 ,  H01L27/02

CPC classification number: H01L27/11521 ,  G11C16/0416 ,  H01L27/0207 ,  H01L27/11519

Abstract: An array of P-channel memory cells is separated into independently programmable memory segments by creating multiple, electrically isolated N-wells upon which the memory segments are fabricated. The methods for creating the multiple, electrically isolated N-wells include p-n junction isolation and dielectric isolation.

公开(公告)号：EP1632025B1

公开(公告)日：2008-11-05

申请号：EP04754523.1

申请日：2004-06-07

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： DEVAL, Philippe ,  KAYAL, Maher ,  VAUCHER, Fabien

IPC: H03F3/45

CPC classification number: H03F3/4521

Abstract: An electronic amplifier circuit comprising an operational amplifier circuit, such as a two-stage operational amplifier circuit, in tandem with a operational transconductance amplifier. The electronic amplifier circuit has high open-loop gain and high gain-bandwidth 5 while maintaining stability over a wide range of operating parameters.