公开(公告)号：US20100142167A1

公开(公告)日：2010-06-10

申请号：US12515804

申请日：2006-11-24

Applicant: Norman Marenco

Inventor： Norman Marenco

IPC: H05K7/00 ,  B32B37/12 ,  B32B38/14

CPC classification number: H01L21/56 ,  H01L23/49855 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/19043 ,  H01L2924/3011 ,  H05K3/12 ,  H05K3/326 ,  H05K3/386 ,  H05K2201/091 ,  H05K2201/10674 ,  H05K2203/0278 ,  Y10T156/10 ,  H01L2924/00 ,  H01L2924/00015

Abstract: An electronic, in particular microelectronic, functional group and to a method for its production are described. The method can include the following steps: a) coating of a mount with a non-conductive adhesive; b) application of a conductor structure to a subarea of the adhesive layer; c) arrangement of an electronic component with at least one external electrical connecting contact on the adhesive layer and on the conductor structure, with the at least one connecting contact of the electronic component being brought directly into contact with the conductor structure, and with a part of the outer casing of the component being brought directly into contact with the adhesive layer. The method can allow electronic, in particular microelectronic, functional groups to be produced with care, quickly and in particular at low cost.

Abstract translation: 描述了一种电子的，特别是微电子的功能组及其生产方法。 该方法可以包括以下步骤：a）用非导电粘合剂涂覆安装件; b）将导体结构施加到粘合剂层的子区域; c）在粘合剂层和导体结构上具有至少一个外部电连接接触件的电子部件的布置，电子部件的至少一个连接接触件与导体结构直接接触，并且与部件 的部件的外壳直接与粘合剂层接触。 该方法可以允许电子的，特别是微电子的功能团体被小心地，特别是以低成本生产。

公开(公告)号：US20100132983A1

公开(公告)日：2010-06-03

申请号：US12541359

申请日：2009-08-14

Applicant: Kai-Chi Lin ,  Hsiu-Ping Chang ,  Chih-Ming Lai

Inventor： Kai-Chi Lin ,  Hsiu-Ping Chang ,  Chih-Ming Lai

IPC: H05K1/02

CPC classification number: H05K1/0271 ,  H05K1/117 ,  H05K3/0058 ,  H05K2201/09045 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2201/10106

Abstract: An exemplary rigid printed circuit board (PCB) includes a main portion, a supporting portion and a connecting portion. The supporting portion is for supporting electrical elements. The connecting portion includes two end portions and a main body therebetween. The main body is spaced from the main portion and the supporting portion. The two end portions are respectively connected to the main portion and the supporting portion. A PCB assembly and a PCB module using the same are also provided.

Abstract translation: 示例性的刚性印刷电路板（PCB）包括主要部分，支撑部分和连接部分。 支撑部分用于支撑电气元件。 连接部分包括两个端部和主体之间。 主体与主要部分和支撑部分间隔开。 两个端部分别连接到主体部分和支撑部分。 还提供了PCB组件和使用其的PCB模块。

公开(公告)号：US07679170B2

公开(公告)日：2010-03-16

申请号：US11607922

申请日：2006-12-04

Applicant: Masashi Yamasaki ,  Mutsumi Yoshino

Inventor： Masashi Yamasaki ,  Mutsumi Yoshino

IPC: H05K3/34 ,  H01L23/48

CPC classification number: H05K7/142 ,  H05K3/202 ,  H05K3/341 ,  H05K2201/091 ,  H05K2201/10598 ,  H05K2203/175 ,  Y10T29/49144

Abstract: An electronic apparatus includes metal wiring plates placed together in the same plane to provide a wiring circuit, electronic devices mounted to the wiring plates through a solder, a case having a base portion and columnar portions extending from the base portion. The wiring plates are fixed to the columnar portions such that the wiring circuit is spaced from the base portion. The wiring plates have an enough thickness to resist a large current for operating the electronic devices and to release heat generated by the electronic devices. The wiring circuit is spaced from the base portion of the case so that the heat generated by the electronic devices is released in the space efficiently. The electronic devices are soldered to the wiring plates at once in a thermal reflow process.

Abstract translation: 电子设备包括在同一平面上放置在一起以提供布线电路的金属布线板，通过焊料安装到布线板的电子设备，具有从基部延伸的基部和柱状部分的壳体。 布线板固定在柱状部分上，使得布线电路与基部间隔开。 布线板具有足够的厚度以抵抗用于操作电子设备的大电流并且释放由电子设备产生的热量。 布线电路与壳体的基部间隔开，使得由电子设备产生的热量有效地释放在空间中。 电子器件在热回流工艺中立即焊接到布线板上。

公开(公告)号：US07652364B2

公开(公告)日：2010-01-26

申请号：US11563972

申请日：2006-11-28

Applicant: James L. Knighten ,  Norman Smith ,  Jun Fan

Inventor： James L. Knighten ,  Norman Smith ,  Jun Fan

IPC: H01L23/52 ,  H05K7/00 ,  H01R12/04

CPC classification number: H05K1/115 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/141 ,  H05K1/147 ,  H05K3/4046 ,  H05K3/429 ,  H05K2201/048 ,  H05K2201/091 ,  H05K2201/09245 ,  H05K2201/09645 ,  H01L2924/00

Abstract: A printed circuit board includes at least two conductive traces, each having a first portion and a second portion. The printed circuit board also includes a cross-over section that includes two electrically conductive portions, each connecting electrically to the first and second portions of a corresponding one of the conductive traces, such that the conductive traces in their first portions lie on opposite sides of each other as they do in their second portions.

Abstract translation: 印刷电路板包括至少两个导电迹线，每个导电迹线具有第一部分和第二部分。 印刷电路板还包括交叉部分，其包括两个导电部分，每个导电部分电连接到相应的一个导电迹线的第一部分和第二部分，使得其第一部分中的导电迹线位于 彼此在他们的第二部分。

公开(公告)号：US07638418B2

公开(公告)日：2009-12-29

申请号：US11676869

申请日：2007-02-20

Applicant: Michael Bauer ,  Rainer Steiner ,  Holger Woerner

Inventor： Michael Bauer ,  Rainer Steiner ,  Holger Woerner

IPC: H01L21/44

CPC classification number: H05K1/111 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0271 ,  H05K1/114 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/091 ,  H05K2203/0278 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A wiring substrate of a semiconductor component includes: an underside with a wiring structure; a top side with cutouts; a rubber-elastic material arranged in the cutouts; and external contact pads arranged on the rubber-elastic material and configured to be coupled to external contacts. A method for producing a wiring substrate of this type, involves pressing the rubber-elastic material pads into a precursor of a polymer plastic during the production process.

Abstract translation: 半导体部件的布线基板包括：具有布线结构的下侧; 顶部有切口; 布置在所述切口中的橡胶弹性材料; 以及设置在橡胶弹性材料上并且被配置为联接到外部触点的外部接触垫。 制造这种布线基板的方法涉及在生产过程中将橡胶弹性材料垫压入聚合物塑料的前体中。

公开(公告)号：US07572031B2

公开(公告)日：2009-08-11

申请号：US11669622

申请日：2007-01-31

Applicant: John C. Schultz ,  Andrew J Ouderkirk ,  Joel S. Peiffer ,  Nelson B. O'Bryan ,  John A. Wheatley ,  Cameron T. Murray

Inventor： John C. Schultz ,  Andrew J Ouderkirk ,  Joel S. Peiffer ,  Nelson B. O'Bryan ,  John A. Wheatley ,  Cameron T. Murray

IPC: F21V33/00

CPC classification number: H05K1/189 ,  F21K9/00 ,  G02F1/133603 ,  G02F2001/133628 ,  H01L2224/48091 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/07811 ,  H01L2924/3011 ,  H05K1/0203 ,  H05K1/0373 ,  H05K1/0393 ,  H05K3/0061 ,  H05K3/386 ,  H05K2201/0209 ,  H05K2201/091 ,  H05K2201/09363 ,  H05K2201/10106 ,  Y10S362/80 ,  H01L2924/00 ,  H01L2224/4554

Abstract: An illumination assembly includes a compliant substrate comprising a first and second electrically conductive foil separated by an electrically insulating layer. The insulating layer includes a polymer material loaded with particles that enhance thermal conductivity of the insulating layer. A plurality of LED dies are disposed on the first conductive foil.

Abstract translation: 照明组件包括柔性衬底，其包括由电绝缘层分隔开的第一和第二导电箔。 绝缘层包括装载有增强绝缘层导热性的颗粒的聚合物材料。 多个LED管芯设置在第一导电箔上。

公开(公告)号：US20090183829A1

公开(公告)日：2009-07-23

申请号：US12016060

申请日：2008-01-17

Applicant: Louis Joseph Rendek,, JR. ,  Lawrence Wayne Shacklette ,  Philip Anthony Marvin

Inventor： Louis Joseph Rendek,, JR. ,  Lawrence Wayne Shacklette ,  Philip Anthony Marvin

IPC: B32B37/14 ,  B32B37/02

CPC classification number: H05K3/0014 ,  H01H2219/01 ,  H05K1/0284 ,  H05K1/185 ,  H05K3/4611 ,  H05K2201/0141 ,  H05K2201/091 ,  H05K2203/1105 ,  H05K2203/302

Abstract: A method is for making a non-planar three-dimensional (3D) multilayered circuit board. The method may include forming a stacked arrangement including at least one pair of liquid crystal polymer (LCP) layers with a bonding layer therebetween. The stacked arrangement may further include at least one electrically conductive pattern layer on at least one of the LCP layers. The method may further include heating and applying pressure to the stacked arrangement to shape the stacked arrangement into a non-planar 3D shape and concurrently causing the bonding layer to bond together the adjacent LCP layers of the stacked arrangement to thereby form the non-planar 3D multi-layered circuit board.

Abstract translation: 一种制造非平面三维（3D）多层电路板的方法。 该方法可以包括形成包括至少一对液晶聚合物（LCP）层的层叠布置，其间具有结合层。 所述堆叠布置还可包括至少一个LCP层上的至少一个导电图案层。 该方法还可以包括加热和施加压力到堆叠的布置以将堆叠布置形成非平面3D形状并且同时使结合层将堆叠布置的相邻LCP层结合在一起，从而形成非平面3D 多层电路板。

公开(公告)号：US20090117757A1

公开(公告)日：2009-05-07

申请号：US12063600

申请日：2005-09-28

Applicant: Hiroyuki Suzuki

Inventor： Hiroyuki Suzuki

IPC: H01R12/00 ,  B23P19/00

CPC classification number: H05K3/361 ,  H05K3/305 ,  H05K3/328 ,  H05K2201/091 ,  H05K2201/10977 ,  H05K2203/0113 ,  H05K2203/0278 ,  Y10T29/53283

Abstract: An object of the invention is to provide a connecting structure of circuit boards in which whether or not the circuit boards have been favorably connected can be more easily judged as compared with the prior art, even in case where connecting portions have been connected with pressure by arranging the connecting portions face to face, a connecting method of the circuit boards, and a compressing tool for connecting the circuit boards. A connecting structure 10 of circuit boards includes a first circuit board 11 and a second circuit board 12. A first connecting portion 17 of the first circuit board and a second connecting portion 21 of the second circuit board are arranged face to face interposing an adhesive 13, and clamped by a compressing tool 25 so that circuit patterns 16, 19 may be brought into contact with each other, whereby the first connecting portion 17 and the second connecting portion 21 will be connected with heat and pressure. In this connecting structure 10 of the circuit boards, a pair of unbonded parts 35 are formed in a compressing region 34 of a soft substrate 18 with which an upper compressing tool 26 is adapted to be contacted.

Abstract translation: 本发明的目的是提供一种电路板的连接结构，其中与现有技术相比，电路板是否被有利地连接在一起可以更容易地判断，即使在连接部分已经被压力连接的情况下 将连接部分面对面地布置，电路板的连接方法以及用于连接电路板的压缩工具。 电路板的连接结构体10包括第一电路板11和第二电路板12.第一电路板的第一连接部分17和第二电路板的第二连接部分21面对面设置粘合剂13 并且被压缩工具25夹紧，使得电路图案16,19可以彼此接触，由此第一连接部分17和第二连接部分21将被连接到热和压力上。 在这种电路板的连接结构10中，在柔性基板18的压缩区域34中形成一对未连接部分35，上压缩工具26适于与该基板接触。

公开(公告)号：US07476105B2

公开(公告)日：2009-01-13

申请号：US11846725

申请日：2007-08-29

Applicant: Jim Chin-Nan Ni ,  Abraham C. Ma ,  Paul Hsueh ,  Ming-Shiang Shen

Inventor： Jim Chin-Nan Ni ,  Abraham C. Ma ,  Paul Hsueh ,  Ming-Shiang Shen

IPC: H01R12/00

CPC classification number: G06K19/07743 ,  A45C2011/188 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G06K19/077 ,  G06K19/07732 ,  G07C9/00087 ,  H05K1/117 ,  H05K1/118 ,  H05K1/189 ,  H05K3/284 ,  H05K3/4691 ,  H05K2201/091 ,  H05K2201/10159 ,  H05K2203/1527

Abstract: A flash-memory device has a printed-circuit board assembly (PCBA) with a PCB with a flash-memory chip and a controller chip. The controller chip includes an external Secure-Digital (SD) interface, and a processing unit to read blocks of data from the flash-memory chip. The PCBA is encased inside an upper case and a lower case, with SD contact pads on the PCB that fit through contact openings in the upper case. Dividers between openings in the upper case that expose the SD contact pads also support the PCB at a slanted angle to the centerline of the device. The PCB slants upward at the far end to allow more thickness for the chips mounted to the bottom surface of the PCB. A user-slidable switch may be slanted to compensate for the PCB slant. The PCB may have a flex section to facilitate the slant without a slanted switch.

Abstract translation: 闪存设备具有印刷电路板组件（PCBA），PCB组件具有闪存芯片和控制器芯片。 控制器芯片包括一个外部安全数字（SD）接口，以及一个处理单元，用于从闪存芯片中读取数据块。 PCBA被封装在上壳体和下壳体内，PCB上的SD接触垫通过上壳体中的接触开口配合。 暴露SD接触垫的上壳体中的开口之间的分隔线也以与设备中心线倾斜的角度支撑PCB。 PCB在远端向上倾斜，以便为安装在PCB底部表面的芯片提供更大的厚度。 用户可滑动的开关可以倾斜以补偿PCB倾斜。 PCB可以具有弯曲部分以便于倾斜而没有倾斜的开关。

公开(公告)号：US20080138575A1

公开(公告)日：2008-06-12

申请号：US11856858

申请日：2007-09-18

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: B32B3/10 ,  H01R43/00

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

Abstract translation: 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。