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公开(公告)号：KR1020110050203A
公开(公告)日：2011-05-13
申请号：KR1020090107081
申请日：2009-11-06
Applicant: 한국전자통신연구원
IPC: H01L31/0352 , H01L31/04
CPC classification number: G02F1/025 , G02F1/2257 , G02F2001/212
Abstract: PURPOSE: An electro-optic device is provided to operate at high speed by including a plurality of depletion layers to reduce the capacitance of the electro-optic device. CONSTITUTION: In an electro-optic device, a substrate(100) comprises an optic area(A) and a peripheral area(B). An optical modulation unit(102) includes a first semiconductor of a first conductive type, a second semiconductor of a first conductive type, and a third semiconductor of a second conductive type. The first and second semiconductors include a first conductive doped area. The optical modulation unit includes a first sidewall and a second sidewall which are opposite to each other. A first recess part(104) and a second recess part(106) are connected to the both sidewalls of the optical modulation unit.
Abstract translation: 目的：提供电光装置以通过包括多个耗尽层来高速操作以减小电光装置的电容。 构成：在电光装置中，衬底（100）包括光学区域（A）和外围区域（B）。 光调制单元（102）包括第一导电类型的第一半导体，第一导电类型的第二半导体和第二导电类型的第三半导体。 第一和第二半导体包括第一导电掺杂区域。 光调制单元包括彼此相对的第一侧壁和第二侧壁。 第一凹部（104）和第二凹部（106）连接到光调制单元的两个侧壁。
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公开(公告)号：KR1020110024098A
公开(公告)日：2011-03-09
申请号：KR1020090081973
申请日：2009-09-01
Applicant: 한국전자통신연구원
IPC: H01L29/861
CPC classification number: G02F1/025 , G02F1/2257 , G02F2001/212
Abstract: PURPOSE: A photoelectric device is provided to implement high integration by a first conductive semiconductor layer and a second conductive semiconductor layer to which a reverse bias voltage is applied. CONSTITUTION: A photoelectric device(150) comprises a substrate, an optical modulation unit(130) and a pair of recess parts. The optical modulation unit is arranged on the substrate and includes a first conductive semiconductor layer, a second conductive semiconductor layer, and a junction layer interposed between the first and second conductive semiconductor layers. The pair of recess parts are extended from the optical modulation unit and have a thinner thickness than the thickness of the optical modulation unit. A reverse bias voltage is applied to the first conductive semiconductor layer and the second conductive semiconductor layer.
Abstract translation: 目的：提供一种通过第一导电半导体层和施加反向偏置电压的第二导电半导体层来实现高集成度的光电装置。 构成：光电装置（150）包括基板，光调制单元（130）和一对凹部。 光调制单元布置在基板上，并且包括第一导电半导体层，第二导电半导体层和插入在第一和第二导电半导体层之间的接合层。 一对凹部从光调制单元延伸出来，其厚度比光调制单元的厚度薄。 反向偏置电压施加到第一导电半导体层和第二导电半导体层。
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公开(公告)号：KR1020100062740A
公开(公告)日：2010-06-10
申请号：KR1020080121509
申请日：2008-12-02
Applicant: 한국전자통신연구원
IPC: H03F3/45
CPC classification number: H03F3/45183 , H03F3/45475 , H03F2203/45138
Abstract: PURPOSE: An operation transconductance amplifier for a filter designing of a vhf bandwidth is provided to gain an OTA property by using a base unit conversion cell of fewer comparing with existing Nauta OTA circuit structure. CONSTITUTION: A first and a second parallel inverters(21,22) are respectively inputted a first and a second input voltage through an input terminal. The input terminal and an output terminal of a first intersection feedback inverter(23) are respectively connected to the output terminal of the second parallel conversion cell and the output terminal of the first parallel conversion cell. The input terminal and the output terminal of a second intersection feedback inverter(24) are respectively connected to the output terminal of the first parallel conversion cell and the output terminal of the second parallel conversion cell. A transconductance and an outputting admittance of the first parallel inverter and the second parallel inverter are similar each other. The transconductance and the outputting admittance of the first intersection feedback inverter and the second intersection feedback inverter are similar each other.
Abstract translation: 目的：提供用于设计vhf带宽的滤波器的运算跨导放大器，通过使用与现有Nauta OTA电路结构相比较少的基本单元转换单元来获得OTA属性。 构成：第一和第二并联逆变器（21,22）分别通过输入端子输入第一和第二输入电压。 第一交叉反馈反相器（23）的输入端子和输出端子分别连接到第二并联变换单元的输出端子和第一并联变换单元的输出端子。 第二交叉反馈反相器（24）的输入端子和输出端子分别连接到第一并联变换单元的输出端子和第二并联变换单元的输出端子。 第一并联逆变器和第二并联逆变器的跨导和输出导纳彼此相似。 第一交叉反馈逆变器和第二交叉反馈逆变器的跨导和输出导纳彼此相似。
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公开(公告)号：KR100958718B1
公开(公告)日：2010-05-18
申请号：KR1020070126708
申请日：2007-12-07
Applicant: 한국전자통신연구원
IPC: H01L31/0232 , H01L31/12
CPC classification number: G02F1/218 , G02F2001/212 , G02F2201/302
Abstract: 광신호의 위상을 변환시키는 광전 소자를 포함하는 반도체 집적회로를 제공한다. 본 발명에 따른 반도체 집적회로는 기판 상에 배치된 반도체 패턴을 포함한다. 반도체 패턴은 광도파로부 및 광도파로부 양측에 배치된 리세스부들을 포함한다. 광신호가 투과하는 광도파로부의 단면적을 감소시켜 고속으로 동작하고 고집적화 및/또는 저소비전력화에 최적화된 광전 소자를 포함하는 반도체 집적회로를 구현할 수 있다.
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公开(公告)号：KR100869963B1
公开(公告)日：2008-11-24
申请号：KR1020070065523
申请日：2007-06-29
Applicant: 한국전자통신연구원
IPC: H03H11/42
Abstract: 본 발명은 VHF 대역의 고주파 필터를 위한 자이레이터에 관한 것으로, 특히 집적회로(IC) 공정에 의해 구현되는 Gm-C 필터에 사용되는 자이레이터에 관한 것이다. Nauta 트랜스컨덕터를 이용한 종래의 자이레이터에서는 입력단의 공통모드 신호가 출력단에 증폭이 되어 나타나는데 반하여 본 발명의 자이레이터를 적용할 경우 입력단의 공통모드 신호가 출력단에 전혀 나타나지 않게 효과적으로 제거할 수 있다. 그리고 기존의 자이레이터의 구조에 비해 적은 갯수의 셀을 사용하여 필터 전체의 주파수 특성이 요구하는 트랜스컨덕턴스값에 전혀 영향을 주지 않으면서 필터의 퀄리티 팩터만을 단독으로 제어하는 자이레이터를 구현함으로써 필터 특성을 효과적으로 개선할 수 있다.
능동필터, Gm-C 필터, Nauta-트랜스컨덕터, 자이레이터, 임피던스 인버터-
Patent Agency Ranking
公开(公告)号：KR1020080052246A
公开(公告)日：2008-06-11
申请号：KR1020070059526
申请日：2007-06-18
Applicant: 한국전자통신연구원
IPC: H03F3/45
CPC classification number: H03F3/45183 , H03F3/45475 , H03F2203/45138
Abstract: A simplified Nauta operational transconductance amplifier is provided to efficiently improving a quality factor by independently controlling the quality factor irrespective of an influence on a transconductance for a frequency characteristic of a filter. A simplified Nauta operational transconductance amplifier includes a first parallel inverter(21), a second parallel inverter(22), a first cross feedback inverter(23), and a second cross feedback inverter(24). The first parallel inverter receives a first input voltage through an input terminal. The second parallel inverter receives a second input voltage through the input terminal. An input terminal of the first cross feedback inverter is coupled to an output terminal of the second parallel conversion cell. An output terminal of the first cross feedback inverter is coupled to an output terminal of the first parallel conversion cell. An input terminal of the second cross feedback inverter is coupled to the output terminal of the first parallel conversion cell. An output terminal of the second cross feedback inverter is coupled to the output terminal of the second parallel conversion cell.
Abstract translation: 提供简化的Nauta操作跨导放大器以通过独立地控制质量因素来有效地提高质量因子，而不管对于过滤器的频率特性的跨导的影响。 简化的Nauta操作跨导放大器包括第一并联逆变器（21），第二并联逆变器（22），第一交叉反馈逆变器（23）和第二交叉反馈逆变器（24）。 第一并联逆变器通过输入端接收第一输入电压。 第二并联逆变器通过输入端接收第二输入电压。 第一交叉反馈反相器的输入端子耦合到第二并联转换单元的输出端子。 第一交叉反馈反相器的输出端耦合到第一并行转换单元的输出端子。 第二交叉反馈逆变器的输入端子耦合到第一并联变换单元的输出端子。 第二交叉反馈反相器的输出端子耦合到第二并联变换单元的输出端子。
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公开(公告)号：KR100651757B1
公开(公告)日：2006-12-01
申请号：KR1020050121034
申请日：2005-12-09
Applicant: 한국전자통신연구원
Abstract: An apparatus for measuring the temperature of a semiconductor light emitting device is provided to precisely measure the temperature of an active region of a semiconductor light emitting device by using a temperature sensing diode integrated next to the semiconductor light emitting device. A light emitting device(220) is integrated on a semiconductor substrate(200). A temperature sensing diode(230) is integrated in parallel with the light emitting device. An insulator(240) electrically insulates the light emitting device from the temperature sensing diode, located between the light emitting device and the temperature sensing diode. A first electrode(210) is formed on the bottom side of the semiconductor substrate, used as a common electrode of the light emitting device and the temperature sensing diode. A second electrode is formed on the light emitting device and the temperature sensing diode. The light emitting device and the temperature sensing diode are separated by an etch method and the separated portion is filled with the insulator.
Abstract translation: 提供一种用于测量半导体发光器件的温度的设备，以通过使用集成在半导体发光器件旁边的温度感测二极管来精确测量半导体发光器件的有源区的温度。 发光器件（220）集成在半导体衬底（200）上。 温度感测二极管（230）与发光器件并联集成。 绝缘体（240）将发光器件与位于发光器件和温度感测二极管之间的温度感测二极管电绝缘。 第一电极（210）形成在半导体衬底的底侧上，用作发光器件和温度感测二极管的公共电极。 在发光器件和温度传感二极管上形成第二电极。 发光装置和温度感测二极管通过蚀刻方法分开，并且分离的部分被绝缘体填充。
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公开(公告)号：KR1020040096376A
公开(公告)日：2004-11-16
申请号：KR1020030029440
申请日：2003-05-09
Applicant: 한국전자통신연구원
IPC: H01S5/32
Abstract: PURPOSE: An optical device and a fabricating method thereof are provided to reduce the optical loss of a passive waveguide by forming an undoped cladding layer on a passive waveguide region. CONSTITUTION: An active mesa pattern(120) is formed on an active waveguide region of a substrate. A passive mesa pattern(122) is formed on a passive waveguide region of the substrate. A first undoped cladding layer(124), an N-type cladding layer(126), and a first P-type cladding layer(128) are sequentially formed on the entire structure. The first P-type cladding layer, the N-type cladding layer, and the first undoped cladding layer are removed from the active waveguide region by performing a pattering process. A second P-type cladding layer(130) is formed on the entire structure. An ohmic contact layer(132) is formed on the second P-type cladding layer.
Abstract translation: 目的：提供一种光学器件及其制造方法，以通过在无源波导区域上形成未掺杂的包层来减少无源波导的光学损耗。 构成：在衬底的有源波导区域上形成活性台面图案（120）。 无源台面图案（122）形成在衬底的无源波导区域上。 在整个结构上依次形成第一未掺杂的包覆层（124），N型包覆层（126）和第一P型包覆层（128）。 通过进行图案化处理，从有源波导区域去除第一P型包覆层，N型包覆层和第一未掺杂包覆层。 在整个结构上形成第二P型包覆层（130）。 欧姆接触层（132）形成在第二P型覆层上。
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公开(公告)号：KR1020040056555A
公开(公告)日：2004-07-01
申请号：KR1020020083056
申请日：2002-12-24
Applicant: 한국전자통신연구원
IPC: G02B6/13
Abstract: PURPOSE: A method for forming a vertical taper using a diffusion phenomenon is provided to enhance a degree of integration of an optical device and simplify conditions of an etching process by using a diffusion-limited etching method to form the vertical taper. CONSTITUTION: A lower peripheral layer(2) of a waveguide, a center layer(3) of the waveguide, an upper peripheral layer(1) of the waveguide, and a selective etching layer(7) are sequentially formed on a substrate. A long ribbon-shaped etching mask(6) is formed on the selective etching layer. The selective etching layer is etched to the inside of the etching mask by using a selective etching solution. A capillary flat plate is formed by the etching process. The upper peripheral layer of the waveguide is partially etched by using the diffusion-limited etching solution.
Abstract translation: 目的：提供使用扩散现象形成垂直锥形的方法，以通过使用扩散限制蚀刻方法来提高光学器件的集成度并简化蚀刻工艺的条件以形成垂直锥形。 构成：在衬底上依次形成波导的下周边（2），波导的中心层（3），波导的上周边（1）和选择性蚀刻层（7）。 在选择性蚀刻层上形成长的带状蚀刻掩模（6）。 通过使用选择性蚀刻溶液将选择性蚀刻层蚀刻到蚀刻掩模的内部。 通过蚀刻工艺形成毛细管平板。 通过使用扩散限制蚀刻溶液部分地蚀刻波导的上周边层。
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公开(公告)号：KR1020040056554A
公开(公告)日：2004-07-01
申请号：KR1020020083055
申请日：2002-12-24
Applicant: 한국전자통신연구원
IPC: G02B6/12
Abstract: PURPOSE: A method for integrating an active optical device and a passive optical device, and an integrated device thereby are provided to form the active optical device and the passive optical device on one substrate by changing a buried ridge waveguide into a strip loaded waveguide. CONSTITUTION: A taper is formed at an end of a passive waveguide connected to a buried ridge waveguide of an active device in order to change the taper into the strip loaded taper when a center of the buried ridge waveguide of the active device is etched. The taper is covered by a re-growth process. The taper is arranged to the taper formed at an end of the buried ridge waveguide. The strip-loaded waveguide is formed by performing an etching process. An etch-stop layer is inserted in the process for growing the passive waveguide layer in order to form constantly the etching depth.
Abstract translation: 目的：提供一种用于集成有源光学器件和无源光学器件的方法，以及由此提供的集成器件，以通过将掩埋脊形波导变换为条带加载波导来在一个基板上形成有源光学器件和无源光学器件。 构成：当有源器件的埋地脊波导的中心被蚀刻时，锥形形成在连接到有源器件的埋地脊波导的无源波导的端部，以便将锥度改变为带状加载锥度。 锥度由再生长过程覆盖。 锥形布置成形成在埋脊形波导的端部处的锥形。 通过进行蚀刻工艺来形成带状波导管。 在用于生长无源波导层的过程中插入蚀刻停止层，以便不断地形成蚀刻深度。
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