公开(公告)号：DE3780030D1

公开(公告)日：1992-07-30

申请号：DE3780030

申请日：1987-10-27

Applicant: IBM

Inventor： DUSI SAMUEL THOMAS ,  ESCOBAR GERMAN ,  HEATH CHESTER ASBURY ,  KIRK RICHARD DANA ,  MANNS KENNETH LYNN ,  MOORE BILLY WILLIAMS ,  NEER JAY HENRY ,  SHAW RICHARD WILLIAM ,  ZADEREJ VICTOR VASYL

IPC: H01R4/64 ,  G06F1/16 ,  G06F13/40 ,  G12B17/02 ,  H05K1/11 ,  H05K7/14 ,  H05K9/00

Abstract: A computer system accepting feature cards for, for example, coupling external peripheral devices includes a plurality of sockets mounted on the planar board to accept edge connectors on the cards, and slots in the main enclosure to permit coupling to external peripherals. To reduce electromagnetic radiation, the slots in the main enclosure have a depth such as to define channels, and the brackets on the cards are of U-shaped cross-section such as to fit within the channels. The channel walls are conductive, and the brackets are shaped to define spaced outward contact points which closely engage the channel walls.

公开(公告)号：BR9002835A

公开(公告)日：1991-08-20

申请号：BR9002835

申请日：1990-06-15

Applicant: IBM

Inventor： BONEVENTO FRANCIS MICHAEL ,  HEATH CHESTER ASBURY ,  MANDESE ERNEST NELSON ,  MENDELSON RICHARD NEIL

IPC: G06F9/48 ,  G06F13/24 ,  G06F15/20

公开(公告)号：IT1217359B

公开(公告)日：1990-03-22

申请号：IT1994688

申请日：1988-03-25

Applicant: IBM

Inventor： CONCILIO IAN A ,  HAWTHORNE JEFFREY A ,  HEATH CHESTER ASBURY ,  LENTA JORGE EDUARDO ,  LONG D NGUYEN

IPC: G06F13/30 ,  G06F13/28 ,  G06F13/36 ,  G06F13/362 ,  G06F13/374 ,  G06F

Abstract: A computer system is coupled to peripherals having their own DMA channel arbiter and peripherals having no arbiter. A separate arbitration unit, controlled directly by the CPU, is provided to arbitrate on behalf of peripherals having no arbiter. The CPU can thus freely assign different arbitration levels to such peripherals, and can instruct the arbitration unit to simultaneously arbitrate on different arbitration levels or for two or more DMA channels.

公开(公告)号：IT1216131B

公开(公告)日：1990-02-22

申请号：IT1982688

申请日：1988-03-18

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  JACKSON KEVIN MICHAEL ,  JUDICE DARRYL EDMOND ,  PESTONJI HOSHANG RATAN

IPC: G06F9/46 ,  G06F9/48 ,  G06F13/24 ,  G06F15/78 ,  G06F

Abstract: A personal computer system with associated interrupt controller is preferably designed to operate with programs and respond to interrupt related commands in one mode, such as level sensitive mode, but is provided with circuitry that enables the system to convert and respond to interrupt-related software commands in another mode, such as edge sensitive (triggered) mode, the system then treating the edge mode signals just as if they were level mode signals.

公开(公告)号：BE1001065A3

公开(公告)日：1989-06-27

申请号：BE8701347

申请日：1987-11-26

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  JACKSON KEVIN MICHAEL ,  JUDICE DARRYL EDMOND ,  PESTONJI

IPC: G06F9/48 ,  G06F9/46 ,  G06F13/24 ,  G06F15/78 ,  G06F

Abstract: Dispositif d'ordinateur personnel comportant une unité de commande d'interruption associée et qui est de préférence conçu pour fonctionner avec des programmes et répondre à des signaux de commande relatifs aux interruptions dans un mode tel que le mode sensible aux niveaux, mais comporte des circuits qui permettent au système de convertir et de répondre à des signaux de commande de logiciel relatifs à des interruptions dans un autre mode tel que le mode sensible aux fronts, le système, dans ce cas, traitant les signaux en mode sensible aux fronts exactement comme s'il s'agissait de signaux en mode sensible aux niveaux.

公开(公告)号：DE3379689D1

公开(公告)日：1989-05-24

申请号：DE3379689

申请日：1983-01-14

Applicant: IBM

Inventor： HEATH CHESTER ASBURY

IPC: G06F13/12 ,  G06F12/14 ,  G06F15/31

公开(公告)号：BE1000951A3

公开(公告)日：1989-05-23

申请号：BE8701346

申请日：1987-11-26

Applicant: IBM

Inventor： DUSI SAMUEL THOMAS ,  ESCOBAR GERMAN ,  HEATH CHESTER ASBURY ,  KIRK RICHARD DANA ,  MANNS KENNETH LYNN ,  MOORE BILLY WILLIAMS ,  ZADEREJ VICTOR VASYL ,  NEER JAY HENRY ,  SHAW RICHARD WILLIAM

IPC: H01R4/64 ,  G06F1/16 ,  G06F13/40 ,  G12B17/02 ,  H05K1/11 ,  H05K7/14 ,  H05K9/00

Abstract: Partie d'un cadre d'un calculateur personnel, au travers duquel des connexions sont assurées entre chaque carte de fonction E/S à l'intérieur du cadre et un dispositif périphérique extérieur au cadre, formée de polycarbonate et intérieurement plaquée de cuivre et de nickel pour former une structure de masse haute fréquence améliorée, couplée à la masse de signal du proceseur au travers d'une capacité, la masse haute fréquence étant au potentiel de masse pour des courants alternatifs de fréquence suffisamment élevée pour rayonner.

公开(公告)号：GB2202350A

公开(公告)日：1988-09-21

申请号：GB8805328

申请日：1988-03-07

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGODD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F1/00 ,  G06F1/18 ,  G06F13/14 ,  G06F1/24 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00

Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

公开(公告)号：FI880694A

公开(公告)日：1988-09-21

申请号：FI880694

申请日：1988-02-15

Applicant: IBM

Inventor： DUSI SAMUEL THOMAS ,  ESCOBAR GERMAN ,  HEATH CHESTER ASBURY ,  KIRK RICHARD DANA ,  MANNS KENNETH LYNN ,  MOORE BILLY WILLIAMS ,  NEER JAY HENRY ,  SHAW RICHARD WILLIAM ,  ZADEREJ VICTOR VASYL

IPC: G06F1/16 ,  H01R4/64 ,  G06F13/40 ,  G12B17/02 ,  H05K1/11 ,  H05K7/14 ,  H05K9/00 ,  H05K

Abstract: A computer system accepting feature cards for, for example, coupling external peripheral devices includes a plurality of sockets mounted on the planar board to accept edge connectors on the cards, and slots in the main enclosure to permit coupling to external peripherals. To reduce electromagnetic radiation, the slots in the main enclosure have a depth such as to define channels, and the brackets on the cards are of U-shaped cross-section such as to fit within the channels. The channel walls are conductive, and the brackets are shaped to define spaced outward contact points which closely engage the channel walls.

公开(公告)号：AU1273888A

公开(公告)日：1988-09-15

申请号：AU1273888

申请日：1988-03-07

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F13/14 ,  G06F1/00 ,  G06F1/18 ,  G06F1/24 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00 ,  G06F12/16 ,  G06F13/12 ,  G06F12/00

Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.