公开(公告)号：JP2004158860A

公开(公告)日：2004-06-03

申请号：JP2003375156

申请日：2003-11-05

Applicant: St Microelectronics Sa ,  エスティマイクロエレクトロニクス エスエー

Inventor： MAZOYER PASCALE ,  VILLARET ALEXANDRE ,  SKOTNICKI THOMAS

IPC: H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC classification number: B82Y10/00 ,  G11C2216/08 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/7888

Abstract: PROBLEM TO BE SOLVED: To realize a single transistor memory cell having the characteristics of a conventional SRAM and a flash memory. SOLUTION: In the memory circuit including at least one memory cell made of a single transistor, an insulating layer is formed between the gate and the channel regions of the transistor so that the insulating layer is parallel with each of the surfaces of the regions; a continuum of potential wells which are arranged with certain distances separated from the gate and the channel region, is formed in the insulating layer. Since the potential wells can include charges, two memory states concerning the memory cell state, i.e. "0"state, and "1" state can be defined by moving the charges to a first entrapping region direction next to the source region, or a second entrapping region direction next to the drain region. COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2003228521A

公开(公告)日：2003-08-15

申请号：JP2002343590

申请日：2002-11-27

Applicant: ST MICROELECTRONICS SA

Inventor： LIARDET PIERRE-YVAN

IPC: G06F12/14 ,  G06F21/55 ,  G06F21/75 ,  G06F21/77 ,  G06F21/79 ,  G06K19/073

Abstract: PROBLEM TO BE SOLVED: To provide a method that blocks an integrated circuit when detecting unauthorized access to information included in the integrated circuit. SOLUTION: A first program is executed to generate a second program executed in a random access memory of an integrated circuit. The second program includes a plurality of instruction sequences, which each end with a branch to another sequence. The second program is next executed. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2003124228A

公开(公告)日：2003-04-25

申请号：JP2002219447

申请日：2002-07-29

Applicant: ST MICROELECTRONICS SA

Inventor： MENUT OLIVIER ,  JAOUEN HERVE ,  BOUCHE GUILLAUME

IPC: H01L21/28 ,  H01L21/265 ,  H01L21/331 ,  H01L21/338 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/732 ,  H01L29/812

Abstract: PROBLEM TO BE SOLVED: To provide a method for simultaneously manufacturing a bipolar transistor and a MOS transistor in an integrated circuit. SOLUTION: There is provided a method for forming a contact between a semiconductor substrate and a doped polysilicon layer deposited on the substrate via an insulating layer. In the method, there is injected an element which makes transparent the insulating layer for the movement of a dopant to the substrate from the polysilicon layer.

公开(公告)号：JP2003051986A

公开(公告)日：2003-02-21

申请号：JP2002154686

申请日：2002-05-28

Applicant: St Microelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： SIMONY LAURENT

IPC: H01L27/146 ,  H04N5/363 ,  H04N5/335

CPC classification number: H04N5/363

Abstract: PROBLEM TO BE SOLVED: To reduce reset noise, and to improve power voltage elimination ratio of a pixel.
SOLUTION: A CMOS active pixel for an image sensor is provided with a photosensing element PD, a capacitive feedback element CF with a capacitance CF, a first transistor(TR) M1, two reset TRs M3, M4, and a pixel selection TR M2. The TRs are arranged and controlled so that the first TR acts like an amplifier in a pixel reset stage and a follower in a read stage. For a first period in the reset stage, a reference voltage is applied to a noninverting input of the amplifier, an output of the amplifier is connected to its inverting input via the two reset TRs. For a second period as a relax period, the output of the amplifier is connected to the inverting input via the capacitive feedback element, and either of the two reset TRs until an equilibrium state is reached, and for a third period, the two reset TRs are turned off.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：减少复位噪声，提高像素的电源电压消除比。 解决方案：用于图像传感器的CMOS有源像素设置有光敏元件PD，具有电容CF的电容反馈元件CF，第一晶体管（TR）M1，两个复位TR M3，M4和像素选择TR M2。 TR的布置和控制使得第一TR起像像素复位阶段中的放大器和读取阶段的跟随器。 对于复位阶段的第一周期，将参考电压施加到放大器的非反相输入端，放大器的输出经由两个复位TR连接到其反相输入端。 对于作为弛豫时段的第二时段，放大器的输出经由电容反馈元件连接到反相输入，并且两个复位TR中的任一个直到达到平衡状态，并且在第三周期中，两个复位TR 被关闭

公开(公告)号：JP2002015564A

公开(公告)日：2002-01-18

申请号：JP2001158867

申请日：2001-05-28

Applicant: ST MICROELECTRONICS SA

Inventor： JACQUET FRANCOIS ,  GODUCHEAU OLIVIER

IPC: G11C11/401 ,  G11C7/08 ,  G11C7/12 ,  G11C7/14 ,  G11C11/409 ,  G11C11/4094 ,  G11C11/4099

Abstract: PROBLEM TO BE SOLVED: To conduct data read out, which is less likely to be adversely affected by a leakage current by precharging reference cells. SOLUTION: Individual memory cells are connected to bit lines and are related to a main reference cell that is connected to a reference bit line. During the step in which memory cells are read and refreshed, the main reference cell and a subreference cell connected to the reference bit line and the bit lines are activated. Then, these two reference cells are deactivated and charged to a final precharge voltage, that is selected to become smaller than or larger than one half of the sum of a high state voltage and a low state voltage (depending on the utilization of NMOS technology or PMOS technology). This is performed by connecting the two reference cells to a capacitive line which is separated from the bit lines and the reference bit line and has a predetermined potential and a preset capacitance value.

公开(公告)号：JP2001319889A

公开(公告)日：2001-11-16

申请号：JP2001097867

申请日：2001-03-30

Applicant: ST MICROELECTRONICS SA ,  KONINKL PHILIPS ELECTRONICS NV

Inventor： DE COSTER WALTER ,  LUNENBORG MEINDERT ,  INARD ALAIN ,  GUELEN JOS

IPC: H01L21/76 ,  H01L21/265 ,  H01L21/266 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/08 ,  H01L29/10 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide an MOS transistor having a voltage threshold causing no damage on the quality by avoiding troubles in conventional technology. SOLUTION: The method for forming an active area surrounded with an insulating area in a semiconductor substrate includes steps for forming in the substrate a trench surrounding the active area, filling the trench with an insulating material to form an edge extending beyond the substrate surface at the periphery of the active area, forming a spacer at the periphery of the edge, and implanting a dopant, whereby the implantation in the area located under the spacer is less deep than in the rest of the active area.

公开(公告)号：JP2001265713A

公开(公告)日：2001-09-28

申请号：JP2000382737

申请日：2000-12-15

Applicant: ST MICROELECTRONICS SA

Inventor： TEGLIA YANNICK

IPC: G06F12/14 ,  G06F1/00 ,  G06F7/58 ,  G06F13/38 ,  G06F21/55 ,  G06F21/62 ,  H04L9/10

Abstract: PROBLEM TO BE SOLVED: To provide a safe transfer method for data for a programmable circuit, which is provided with a control unit, a read only memory(ROM) having data to be transferred, a writable memory and a data bus for connecting the ROM and the writable memory, for controlling the data bus with the control unit. SOLUTION: The secret data element of N bits to be transferred is transited through the data bus for the unit of byte and each of bytes is transited through the data bus just once. Further, the byte is transferred according to a transfer rule having at least one parameter selected at random by the control unit before transferring each of secret data elements.

公开(公告)号：JP2001237747A

公开(公告)日：2001-08-31

申请号：JP2000377457

申请日：2000-12-12

Applicant: ST MICROELECTRONICS SA ,  ST MICROELECTRONICS NV

Inventor： NORDSTROEM TOMAS ,  BENGTSSON DANIEL ,  ISSON OLIVIER

IPC: H04J11/00 ,  H04B1/62 ,  H04B3/32 ,  H04L25/03 ,  H04L27/26

Abstract: PROBLEM TO BE SOLVED: To provide a canceller circuit which can eliminate far-edge crosstalks, in a digital subscriber circuit transmission system. SOLUTION: This system includes a pre-compensation means which multiplies a vector S=(Si), where i is equal to 1 to n by a pre-compensation matrix M prior to transmission, so as to obtain a diagonal matrix product H*M. In this example, H is a transmission matrix of plural transmission channels as prescribed by R=H*S and R=(Ri), where i is equal to 1 to n is a vector of discrete multi-tone symbol Ri that is received by a modem. Such a system configuration is attained by a far-edge crosstalk eliminating circuit.

公开(公告)号：JP2001223223A

公开(公告)日：2001-08-17

申请号：JP2000394758

申请日：2000-12-26

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC ,  PEZZANI ROBERT

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/861 ,  H01L29/866 ,  H03G11/02

Abstract: PROBLEM TO BE SOLVED: To provide a clipping device for adsorbing current peaks from one to 10 amperes. SOLUTION: A base of a vertical N-P-N transistor is provided in a non- contact state, an emitter of the transistor is connected with a terminal to generate positive voltage peaks and a collector of the transistor is grounded. The parameters of the transistor are set so that a negative dynamic resistance is obtained.

公开(公告)号：JP2001168109A

公开(公告)日：2001-06-22

申请号：JP2000322516

申请日：2000-10-23

Applicant: ST MICROELECTRONICS SA

Inventor： GRIS YVON

IPC: H01L21/28 ,  H01L21/331 ,  H01L29/165 ,  H01L29/417 ,  H01L29/73

Abstract: PROBLEM TO BE SOLVED: To provide a method for deciding two self-aligned areas on the surface of a substrate. SOLUTION: A protecting layer is accumulated, a coat layer is accumulated, the protecting layer and the coat layer are allowed to have opening at positions almost corresponding to the desired boundary of two self-aligned areas, and a spacer is formed along the side faces of the opening. The spacer is provided with a rear part against the boundary and the opposite front part, the protecting layer and the coat layer are allowed to have opening at the back of the rear of the spacer, and the protecting layer is removed until getting to the rear part of the spacer. Then, the two self-aligned areas are decided at the both sides of the length of the spacer.