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公开(公告)号：KR1020090032821A
公开(公告)日：2009-04-01
申请号：KR1020070098360
申请日：2007-09-28
Applicant: 삼성전자주식회사
CPC classification number: G06F12/0862 , G06F12/0866 , G06F12/0897 , G06F2212/221 , G06F2212/222
Abstract: A pre-fetching method of a hard disk drive, and a recording medium and an apparatus suitable for the same are provided to perform effective pre-fetch even when an external device makes a request of random type, by using the nonvolatile cache management message of the external device. A pre-fetching method of a hard disk drive comprises a step of searching whether the logical block address of data requested from an external device is stored in the history of a nonvolatile cache(102), and a step of storing data recorded in the logical block address stored next to the logical block address of the requested data in a buffer when the logical block address of the requested data is stored in the history(107).
Abstract translation: 提供硬盘驱动器的预取方法以及适用于其的装置的记录介质和装置，以便即使当外部设备进行随机类型的请求时，也可以通过使用非易失性高速缓存管理消息来执行有效的预取 外部设备。 硬盘驱动器的预取方法包括以下步骤：搜索从外部设备请求的数据的逻辑块地址是否存储在非易失性高速缓存（102）的历史中;以及步骤，存储记录在逻辑 当所请求的数据的逻辑块地址被存储在历史（107）中时，缓冲器中存储在所请求数据的逻辑块地址旁边的块地址。
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公开(公告)号：KR100800476B1
公开(公告)日：2008-02-04
申请号：KR1020060064974
申请日：2006-07-11
Applicant: 삼성전자주식회사
Inventor： 김신
IPC: H01L23/12
CPC classification number: H01L23/3114 , H01L21/561 , H01L23/13 , H01L23/5389 , H01L24/11 , H01L24/12 , H01L24/81 , H01L24/83 , H01L24/94 , H01L25/105 , H01L2224/03334 , H01L2224/0401 , H01L2224/05624 , H01L2224/13099 , H01L2224/16105 , H01L2224/16157 , H01L2224/274 , H01L2224/8121 , H01L2224/81815 , H01L2224/83 , H01L2225/1005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/014 , H01L2924/15153 , H01L2924/15165 , H01L2924/181 , H05K1/183 , H05K1/184 , H05K2201/09845 , H05K2201/10477 , H05K2201/10727 , H01L2924/00 , H01L2924/00014
Abstract: 측면이 노출된 접속단자를 구비한 반도체 패키지 및 그 제조방법과 접속단자의 측면이 노출된 반도체 패키지를 구비한 반도체 모듈 및 그 제조방법을 개시한다. 반도체 패키지는 서로 대향하는 제1면 및 제2면을 구비한 반도체 웨이퍼; 및 상기 반도체 웨이퍼의 에지를 따라 상기 제1면상에 일렬로 배열되고, 그의 일 측면이 노출된 다수의 도전성 패드를 구비하는 반도체 칩을 구비한다. 절연막이 상기 도전성 패드 및 상기 반도체 웨이퍼의 상기 제1면상에 형성되어, 상기 도전성 패드의 일부분을 노출시키는 개구부를 구비한다. 다수의 접속단자들이 상기 개구부를 통해 노출된 상기 도전성 패드에 각각 배열되어 상기 도전성 패드와 전기적으로 접촉된다. 보강부재가 상기 다수의 접속단자의 일부분을 덮도록 상기 절연막상에 배열된다.
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公开(公告)号：KR1020080006172A
公开(公告)日：2008-01-16
申请号：KR1020060064974
申请日：2006-07-11
Applicant: 삼성전자주식회사
Inventor： 김신
IPC: H01L23/12
CPC classification number: H01L23/3114 , H01L21/561 , H01L23/13 , H01L23/5389 , H01L24/11 , H01L24/12 , H01L24/81 , H01L24/83 , H01L24/94 , H01L25/105 , H01L2224/03334 , H01L2224/0401 , H01L2224/05624 , H01L2224/13099 , H01L2224/16105 , H01L2224/16157 , H01L2224/274 , H01L2224/8121 , H01L2224/81815 , H01L2224/83 , H01L2225/1005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/014 , H01L2924/15153 , H01L2924/15165 , H01L2924/181 , H05K1/183 , H05K1/184 , H05K2201/09845 , H05K2201/10477 , H05K2201/10727 , H01L2924/00 , H01L2924/00014
Abstract: A semiconductor package, a semiconductor module, and a method for manufacturing the semiconductor module are provided to improve a data transfer speed by decreasing a line length between the semiconductor package and an external circuit. A semiconductor package comprises a semiconductor wafer(210), plural conductive pads(220), an insulation film(230), plural connection terminals(240), and a reinforcement member(250). The semiconductor wafer includes first and second surfaces. The conductive pads are arranged in one row on the first surface along an edge of the semiconductor wafer. First sides of the conductive pads are exposed. The insulation film is formed on the conductive pad and the first surface and includes an aperture for exposing a portion of the conductive pad. The connection terminals are arranged on the conductive pad to be electrically connected to the conductive pad. Side portions of the connection terminals are exposed. The reinforcement member is arranged on the insulation film, such that the side portion of the connection terminal is covered.
Abstract translation: 提供半导体封装，半导体模块和用于制造半导体模块的方法，以通过减小半导体封装和外部电路之间的线路长度来提高数据传输速度。 半导体封装包括半导体晶片（210），多个导电焊盘（220），绝缘膜（230），多个连接端子（240）和加强构件（250）。 半导体晶片包括第一和第二表面。 导电焊盘沿着半导体晶片的边缘在第一表面上排成一列。 导电垫的第一面露出。 绝缘膜形成在导电焊盘和第一表面上，并且包括用于暴露导电焊盘的一部分的孔。 连接端子布置在导电焊盘上以电连接到导电焊盘。 连接端子的侧面露出。 加强构件布置在绝缘膜上，使得连接端子的侧部被覆盖。
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公开(公告)号：KR1020030029743A
公开(公告)日：2003-04-16
申请号：KR1020010062435
申请日：2001-10-10
Applicant: 삼성전자주식회사
Inventor： 김신
IPC: H01L23/14
CPC classification number: H01L23/3114 , H01L23/4985 , H01L24/48 , H01L25/105 , H01L2224/05599 , H01L2224/32225 , H01L2224/45099 , H01L2224/4824 , H01L2224/73215 , H01L2224/85399 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
Abstract: PURPOSE: A stack package using a flexible double wired substrate is provided to reduce an error rate of the stack package by using a base package and unit packages in a reliable manner. CONSTITUTION: A stack package includes a base package(200), and unit packages(300) three-dimensionally deposited on the base package(200). The base package(200) has a plurality of contact terminals(160). The first and the second unit packages(300a,300b) are formed on the base package(200). The first unit package(300a) has a side contacting the contact terminals of the base package(200), and an opposite side with first contact terminals(260a) electrically connected to the contact terminals(160) of the base package(200). The second unit package(300b) has a side contacting the first contact terminals(260a) of the first unit package(300a), and an opposite side with second contact terminals(260b) electrically connected to the first contact terminals(260a).
Abstract translation: 目的：提供使用柔性双接线基板的堆叠封装，以便以可靠的方式使用基本封装和单元封装来降低堆叠封装的错误率。 构成：堆叠封装包括基底封装（200）和三维沉积在基底封装（200）上的单元封装（300）。 基部封装（200）具有多个接触端子（160）。 第一和第二单元封装（300a，300b）形成在基底封装（200）上。 第一单元封装（300a）具有与基底封装（200）的接触端子接触的一侧，以及与基底封装（200）的接触端子（160）电连接的第一接触端子（260a）的相对侧。 第二单元封装（300b）具有与第一单元封装（300a）的第一接触端子（260a）接触的一侧，以及与第一接触端子（260a）电连接的第二接触端子（260b）的相对侧。
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公开(公告)号：KR1020030015653A
公开(公告)日：2003-02-25
申请号：KR1020010049516
申请日：2001-08-17
Applicant: 삼성전자주식회사
Inventor： 김신
IPC: H01L23/12
CPC classification number: H01L2224/4824
Abstract: PURPOSE: A stack chip scale package is provided to highly integrate and miniaturize a memory product and to make a mass production without making a large investment through a conventional process. CONSTITUTION: An electronic circuit is integrated in a semiconductor chip(1). Elastomer(2) for attaching the chip is adhered to the upper surface of polyimide tape(3). A copper pattern(5) and resist(7) for protecting the copper pattern are adhered to the lower surface of the polyimide tape. A wire(4) electrically connects the chip with the copper pattern to transmit a signal. A plurality of the first and second solder balls(9a,9b) are melted and attached to a surface of the copper pattern to transmit the signal to the outside, connected to the copper pattern. A resin encapsulating unit(6) protects the chip and its peripheral constitution parts from outside oxidation and corrosion. The third chip scale package(8c) and the first and second chip scale packages(8a,8b) constitute a mirror type. A solder ball land corresponding to the second solder ball is formed in the third chip scale package. The second solder ball of the first and second chip scale package is connected to the solder ball land of the third chip scale package so that the first and second chip scale packages are electrically connected to the third chip scale package.
Abstract translation: 目的：提供堆叠芯片级封装，以高度集成和小型化存储器产品，并通过常规工艺大量生产，而不需要大量投资。 构成：电子电路集成在半导体芯片（1）中。 用于安装芯片的弹性体（2）粘附到聚酰亚胺胶带（3）的上表面。 用于保护铜图案的铜图案（5）和抗蚀剂（7）粘附到聚酰亚胺胶带的下表面。 线（4）将芯片与铜图案电连接以传输信号。 多个第一和第二焊球（9a，9b）熔化并附着到铜图案的表面，以将信号传输到外部，连接到铜图案。 树脂封装单元（6）保护芯片及其周边结构部件免受外部氧化和腐蚀。 第三芯片级封装（8c）和第一和第二芯片级封装（8a，8b）构成反射镜类型。 在第三芯片级封装中形成与第二焊球对应的焊球焊盘。 第一和第二芯片级封装的第二焊球连接到第三芯片级封装的焊球焊盘，使得第一和第二芯片级封装电连接到第三芯片级封装。
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Patent Agency Ranking
公开(公告)号：KR1020020069288A
公开(公告)日：2002-08-30
申请号：KR1020010009468
申请日：2001-02-24
Applicant: 삼성전자주식회사
IPC: H01L23/28
CPC classification number: H01L24/06 , H01L23/13 , H01L23/24 , H01L23/3114 , H01L23/49572 , H01L23/4985 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05644 , H01L2224/05647 , H01L2224/06136 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/48644 , H01L2224/48647 , H01L2224/73215 , H01L2224/83192 , H01L2224/92147 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/0102 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: PURPOSE: A semiconductor package using a tape circuit board with a groove for preventing a flood of encapsulant is provided to prevent the encapsulant of the first resin encapsulating unit from contaminating a solder ball pad adjacent to a window, by forming the groove for preventing the flood of the encapsulant in the circumference of the window. CONSTITUTION: A plurality of electrode pads are formed along the center portion of the active surface of a semiconductor chip are formed. A tape circuit board includes polyimide tape(121), an interconnection pattern(123) having a substrate pad(124) and a solder ball pad(126), and a protecting layer(125). The active surface of the semiconductor chip is attached to the lower surface of the polyimide tape. The electrode pad is exposed to the exterior through the window(122). A plurality of bonding wires electrically connect the electrode pad of the semiconductor chip with the substrate pad of the tape circuit board through the window. The window and the substrate pad are encapsulated with a liquid encapsulating material to protect the electrode pad and the bonding wire from the exterior. A plurality of solder balls are respectively formed in the solder ball pad. The protecting layer in the circumference of the window including the substrate pad is cut down to form the groove for preventing the flood of the encapsulant so that the liquid encapsulating material does not flow, wherein the interconnection pattern is not exposed to the exterior.
Abstract translation: 目的：提供一种半导体封装，使用具有用于防止密封剂泛滥的凹槽的带电路板，以防止第一树脂封装单元的密封剂通过形成用于防止洪水的凹槽而污染邻近窗口的焊球垫 的密封剂在窗口的圆周中。 构成：形成沿着半导体芯片的有源面的中心部分的多个电极焊盘。 带状电路板包括聚酰亚胺胶带（121），具有衬底焊盘（124）和焊球焊盘（126）的互连图案（123）和保护层（125）。 半导体芯片的有源表面附着在聚酰亚胺胶带的下表面。 电极焊盘通过窗口（122）暴露于外部。 多个接合线通过窗口将半导体芯片的电极焊盘与带电路板的衬底焊盘电连接。 窗口和衬底垫片用液体封装材料封装，以保护电极焊盘和焊接线与外部。 多个焊球分别形成在焊球垫中。 包括衬底垫在内的窗口周围的保护层被切割以形成沟槽，以防止密封剂淹没，使得液体封装材料不流动，其中互连图案不暴露于外部。
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公开(公告)号：KR1020020060309A
公开(公告)日：2002-07-18
申请号：KR1020010001310
申请日：2001-01-10
Applicant: 삼성전자주식회사
Inventor： 김신
Abstract: PURPOSE: A method for forming and soldering a via hole is provided to decrease the production cost and increase the productivity by forming the via hole mechanically in order not to form the smear. CONSTITUTION: An insulation layer(101) has an upper surface and a lower surface. The via hole(103) penetrating the upper and the lower surface is formed. The first and the second metal layer(110,120) are formed on the upper and the lower surface(101a,101b). The via hole is exposed by removing the first metal film covering the via hole. A soldering material(105) is inserted into the via hole. The soldering material is inserted by an automatic device having a vacuum sucking hole and is composed of the materials such as the solder and copper having the electric conductivity in order to connect the first and the second metal film electrically. The via hole is soldered by heating the solder material.
Abstract translation: 目的：提供一种用于形成和焊接通孔的方法，以通过机械地形成通孔来降低生产成本并提高生产率，以便不形成涂片。 构成：绝缘层（101）具有上表面和下表面。 形成穿透上下表面的通孔（103）。 第一和第二金属层（110,120）形成在上表面和下表面（101a，101b）上。 通过去除覆盖通孔的第一金属膜来暴露通孔。 焊接材料（105）插入通孔中。 焊料通过具有真空吸孔的自动装置插入，并且由具有导电性的诸如焊料和铜的材料组成，以便电连接第一和第二金属膜。 通孔通过加热焊料材料进行焊接。
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公开(公告)号：KR1019990001716A
公开(公告)日：1999-01-15
申请号：KR1019970025132
申请日：1997-06-17
Applicant: 삼성전자주식회사
IPC: H01L23/48
Abstract: 본 발명은 내부리드들에 강한 점성의 접착제를 동시에 도포하여 생산성을 향상시키도록 한 LOC리드프레임용 접착제 도포장치 및 그 도포방법에 관한 것이다.
본 발명의 목적은 비교적 강한 점성의 접착제를 도포함과 아울러 도포공정의 생산성을 향상할 수 있도록 한 LOC리드프레임용 접착제 도포장치 및 그 도포방법을 제공하는데 있다.
이와 같은 목적을 달성하기 위한 본 발명에 의한 LOC리드프레임용 접착제 도포장치 및 도포방법은 접착제 저장고의 요홈부에 담겨진 접착제를 접착제 도포부의 돌출부들에 묻혀서 내부리드들에 동시에 도포한다. 따라서, 본 발명은 접착제 도포공정의 생산성을 향상시킴과 아울러 강한 점성의 접착제를 도포할 수 있다.-
公开(公告)号：KR1020210033462A
公开(公告)日：2021-03-26
申请号：KR1020210035919
申请日：2021-03-19
Applicant: 삼성전자주식회사
Abstract: 본발명의사상에따른청소장치는이물질이집진되는집진통을포함하는진공청소기와집진통에집진된이물질을제거하도록집진통과연결되는도킹스테이션을포함하고, 집진통은원심회전분리를통해이물질을집진하도록마련되고, 도킹스테이션에도킹되도록마련되고, 도킹스테이션은도킹스테이션에도킹된집진통내의이물질과내부공기를흡입하는흡입장치를포함한다.
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