Abstract:
A display device and a control method thereof are provided to improve an image quality by applying a color sequential display scheme in driving the display device while minimizing the data conversion. A display device includes an LCD(Liquid Crystal Display) panel(210), an image data arranging unit(110), a data driver(240), and an optical source. The image data arranging unit separates image data corresponding to one input frame from the outside, arranges the separated image according to the colors, and generates plural sub-frames. The data driver sequentially applies the arranged image to the LCD panel on sub-frame basis. The optical source sequentially supplies at least two different color beams to the LCD panel for every frames. The display device includes a memory(120,130), which sequentially stores the sub-frames.
Abstract:
A low power liquid crystal display device is provided to reduce manufacturing cost of the liquid crystal display device by forming a charge-coupling element inside an LCD(Liquid Crystal Display) panel. An LCD panel(440) includes plural gate lines, plural data lines, and plural pixels. The data lines cross the gate lines. The pixels are arranged in a matrix form in a region, which is surrounded with the gate and data lines. A first switching unit(420) supplies an image signal to the data line according to a control signal. A second switching unit(430) is arranged between the data lines and shares the charges, which are accumulated in adjacent data lines according to the control signal. A control signal generator(410) generates a control signal for controlling the first and second switching units.
Abstract:
A semiconductor structure processing method and a method for manufacturing a semiconductor capacitor using the same are provided to restrain the damage of a lower electrode and to reduce the contact between adjacent lower electrodes by performing a cleaning process using a predetermined solution with a relatively small surface tension compared to water. A cleaning process is performed on a semiconductor structure. The semiconductor structure includes predetermined patterns(56) spaced apart from each other. The predetermined pattern has a large aspect ratio. The cleaning process is performed by using a predetermined solution with a relatively small surface tension compared to water. A drying process is performed on the semiconductor structure under an isopropylalcohol vapor atmosphere. The predetermined solution of the cleaning process is made of one selected from a group consisting of isopropylalcohol, ethanol, diluted isopropylalcohol and diluted ethanol.
Abstract:
A method for manufacturing a conductive pattern and a semiconductor device are provided to obtain a stable structure by using an etch solution. A mold film(110) having an opening is formed on a substrate(100). A conductive pattern(120) is sequentially formed at a sidewall and a lower surface of the opening. A part of the mold film is removed to expose a part of the conductive pattern. A surface of the exposed conductive pattern is etched using an etching solution having ozone and hydrofluoric acid to reduce a thickness of the exposed conductive pattern. A buffer film(130) is formed to fill the opening. A conductive film is sequentially at an upper surface of the mold film, a sidewall and a lower surface of the opening. A CMP process is performed in the resultant structure exposing an upper surface of the mold film to form the conductive pattern.
Abstract:
A display panel, a display device having the same and a driving method thereof are provided to secure a driving margin in executing impulsive driving and to improve the moving image display characteristic by forming a driving element in a unit pixel. A display panel includes a liquid crystal capacitor(CLC) formed in a region surrounded by a gate wire(GL) and a data wire(DL); a switching element(TFT1) for transmitting data voltage applied to the data wire to the liquid crystal capacitor as the gate wire is activated; a storage capacitor(CST) connected to the liquid crystal capacitor; an impulse gate wire(IDL) for transmitting an impulse gate signal; and an impulse driving element(TFT2) for transmitting common voltage(Vst) of the storage capacitor to the liquid crystal capacitor as the impulse gate wire is activated.
Abstract:
누설 전류 감소를 위한 레벨 쉬프팅 회로 및 방법이 개시된다. 상기 레벨 쉬프팅 회로는 출력단과 소스 사이에 직렬 연결된 MOSFET들을 포함하고, VCC 로직 레벨 및 VSS1 로직 레벨을 가지는 입력 신호를 수신하며, 상기 MOSFET들 중 하나에 인가되는 피드백 신호를 이용하여 상기 입력 신호를 VCC 로직 레벨 및 VSS2 로직 레벨을 가지는 신호로 변환하여 상기 변환된 신호를 출력 신호로서 생성하는 로직 회로 및 상기 출력 신호를 이용하여 상기 피드백 신호를 생성하는 피드백 회로를 구비한다.
Abstract:
본 발명의 실시예에 따른 박막 트랜지스터 표시판은 기판, 기판 위에 형성되어 있는 게이트선, 게이트선과 절연되어 교차하고 있는 데이터선, 데이터선과 나란하게 뻗어 있는 용량성 보조 전극, 각각의 게이트선 및 데이터선과 연결되어 있으며, 드레인 전극을 가지는 박막 트랜지스터, 데이터선과 나란하게 뻗어 용량성 보조 전극과 중첩하며, 드레인 전극과 연결되어 있는 용량성 결합 전극, 그리고 드레인 전극과 연결되어 있는 제1 화소 전극과 용량성 보조 전극과 연결되어 있는 제2 화소 전극을 가지는 화소 전극을 포함한다. 액정표시장치, 용량성결합, 화소 전극, 결합전극, 시인성
Abstract:
The device has an array region with a set of memory cell arrays including two wordline enable drivers (211, 212) for generating wordline enable signals on wordline enable signal lines. A sub-wordline driver drives a sub-wordline in reply to the signals. The lines extend vertically and horizontally to connect to the sub-wordline driver such that the lines are shorter in length and are made of a metal with smaller resistance. An independent claim is also included for a method of arranging wordline enable signal lines in a semiconductor device.
Abstract:
본 발명은 고속 데이터 처리가 요구되는 광대역 무선 통신 시스템에서 부품 소자들 간의 신호 송수신 시 타이밍 이득(timing margin) 및/또는 신호 무결성(signal integrity)을 향상시킬 수 있도록 된 광대역 무선 통신 시스템의 통신 소자를 연결하는 링형 버스 구조에 대한 것으로서, 이는 광대역 무선 통신 시스템의 통신 장비내 다수의 부품 소자들을 연결하는 버스 구조에 있어서, 상기 다수의 부품 소자들을 버스 선로로 연결하여 폐루프를 형성하며, 상기 부품 소자들 중 적어도 하나는 드라이버로 동작되며, 나머지 부품 소자들은 수신기로 동작을 특징으로 한다. 광대역 무선 통신 시스템, 버스, 타이밍 이득, 신호 무결성, 부품
Abstract:
An address coding method, which is performed by a memory device including a plurality of banks each being shared by at least two memory blocks, includes: activating adjacent banks shared by at least two memory blocks during a refresh operation of the memory device, and enabling the refresh operation in each bank alternately between the at least two memory blocks. The method includes activating adjacent banks shared by the at least two memory blocks during another operation of the memory device, and enabling the another operation in each bank alternately between the at least two memory blocks.