公开(公告)号：DE69939300D1

公开(公告)日：2008-09-25

申请号：DE69939300

申请日：1999-06-17

Applicant: SIEMENS AG ,  IBM

Inventor： ARNDT KENNETH C ,  GAMBINO JEFFREY P ,  MANDELMA JACK A ,  NARAYAN CHANDRASEKHAR ,  SCHNABEL RAINES F ,  SCHUTZ RONALD J ,  TOBBEN DIRK

IPC: H01L21/82 ,  H01L23/525 ,  H01L21/768

Abstract: A semiconductor structure comprising a semiconductor substrate, an electrically conductive level on the substrate and a metal fuse located at the conductive level wherein the fuse comprises a self-aligned dielectric etch stop layer thereon is provided along with processes for its fabrication.

公开(公告)号：DE60132435T2

公开(公告)日：2008-07-31

申请号：DE60132435

申请日：2001-03-12

Applicant: IBM ,  QIMONDA AG

Inventor： CLEVENGER LARRY ,  HSU LOUIS L ,  NARAYAN CHANDRASEKHAR ,  STEPHENS JEREMY K ,  WISE MICHAEL

IPC: H01L23/525 ,  H01L21/768

Abstract: An electrical fuse structure comprises a semiconductor substrate; at least one electrically insulating layer over the semiconductor substrate having a portion thereof containing electrical wiring and another, adjacent portion thereof substantially free of electrical wiring; optionally, a further electrically insulating layer over the at least one electrically insulating layer. The electrically insulating layer(s) have a depression formed over the portion substantially free of electrical wiring, with the depression having a lower surface level than an adjacent portion of the electrically insulating layer. The fuse structure also includes a fuse insulator disposed over the depression and a fuse over the fuse insulator. Preferably, the fuse insulator is disposed only in the depression to elevate the fuse to the same level as the adjacent portion of the electrically insulating layer. The fuse structure may have a single layer or comprise alternating layers having different degrees of reflectivity to a laser beam, such as alternating layers of silicon oxide and silicon nitride. The preferred fuse structure comprises an electrically and thermally resistive fuse insulator in the depression, such that the fuse insulator substantially prevents heat of an energy beam directed at the fuse from being transmitted to the semiconductor substrate. More preferably, the fuse formed has a width less that that of the fuse insulator. The fuse structure may further include additional wiring over the electrical insulating layer at the same level as the fuse.

公开(公告)号：DE60011190T2

公开(公告)日：2005-06-30

申请号：DE60011190

申请日：2000-07-25

Applicant: INFINEON TECHNOLOGIES AG ,  IBM

Inventor： NARAYAN CHANDRASEKHAR ,  ARNDT KENNETH ,  KIRIHATA TOSHIAKI ,  DANIEL GABRIEL ,  LACHTRUPP DAVID ,  BRINTZINGER AXEL

IPC: H01L21/82 ,  H01H85/00 ,  H01H85/02 ,  H01H85/044 ,  H01H85/046 ,  H01L21/66 ,  H01L23/525 ,  H01L27/02

Abstract: A plurality of fuses of different types, each type of fuse serving a specific purpose are positioned on a semiconductor integrated circuit wafer, wherein activating one type of fuse does not incapacitate fuses of a different type. Fuses of the first type, e.g., laser activated fuses, are primarily used for repairing defects at the wafer level, whereas fuses of the second type, e.g., electrically activated fuses, are used for repairing defects found after mounting the IC chips on a module and stressing the module at burn-in test. Defects at the module level typically are single cell failures which are cured by the electrically programmed fuses to activate module level redundancies.

公开(公告)号：DE69633998D1

公开(公告)日：2005-01-13

申请号：DE69633998

申请日：1996-09-04

Applicant: IBM

Inventor： CIPOLLA THOMAS M ,  COLGAN EVAN ,  MELCHER ROBERT L ,  MOK LAWRENCE S ,  NARAYAN CHANDRASEKHAR ,  SHI LEATHEN ,  YANG KEI-HSIUNG

IPC: G02F1/13 ,  G02F1/133 ,  G02F1/1333 ,  G02F1/136 ,  G09F9/00 ,  H04N5/74 ,  G02F1/1335 ,  H04N9/31

Abstract: A liquid crystal element, a packaging structure providing thermal and alignment control, a display device including the same, and methods of fabrication and assembly are provided. The liquid crystal element includes: a semiconductor wafer, having microcircuitry and an array of reflective pixels; a layer of electro-optical responsive liquid crystal medium, of uniform thickness, disposed on the reflective pixels; a transparent conductive layer positioned on the liquid crystal, being substantially parallel to the reflective layers, to ensure a uniform thickness of the liquid crystal; and an insulative transparent layer provided on the conductive layer. The liquid crystal element is laminated to an optically flat substrate to limit the out-of-plane distortions thereof. The structure formed by element and substrate are disposed in a substrate holder which is mounted to a wiring board, and coupled to voltage sources for actuating the liquid crystal. During mounting, an aligning fixture is used to ensure proper orientation of the element relative to the related optical elements. Once the element is positioned, a heat sink is coupled to the rear surface of the substrate holder to dissipate heat.

公开(公告)号：DE69714644T2

公开(公告)日：2003-05-28

申请号：DE69714644

申请日：1997-04-22

Applicant: IBM

Inventor： ALT PAUL MATTHEW ,  CHALCO PEDRO A ,  FURMAN BRUCE KENNETH ,  HORTON RAYMOND ROBERT ,  NARAYAN CHANDRASEKHAR ,  OWENS JR ,  WARREN KEVIN WILSON ,  WRIGHT STEVEN LORENZ

IPC: G02F1/1343 ,  G02F1/13 ,  G02F1/1362 ,  G06F11/20 ,  G09F9/30 ,  G09G3/20 ,  G09G3/36 ,  G11C29/00

Abstract: A matrix addressed display system designed so as to enable data line (22) repair by electronic mechanisms which is efficient and low in cost and thus increases yield. Such active data line (22) repair utilizes additional data driver (36) outputs, a defect map memory (48) in the TFT/LCD module and modification of the data stream to the data drivers (36) by additional circuits (42) between the display and the display adapter. A bus configuration on the display substrate is utilized which combines repair flexibility, low parasitic capacitance, and the ability to easily make the necessary interconnections. The number of interconnections is kept to a minimum, the connections are reliable, and the connections may be made with conventional wire bond or laser bond technology, or disk bond technology.

公开(公告)号：DE69714644D1

公开(公告)日：2002-09-19

申请号：DE69714644

申请日：1997-04-22

Applicant: IBM

Inventor： ALT PAUL MATTHEW ,  CHALCO PEDRO A ,  FURMAN BRUCE KENNETH ,  HORTON RAYMOND ROBERT ,  NARAYAN CHANDRASEKHAR ,  OWENS JR ,  WARREN KEVIN WILSON ,  WRIGHT STEVEN LORENZ

IPC: G02F1/1343 ,  G02F1/13 ,  G02F1/1362 ,  G06F11/20 ,  G09F9/30 ,  G09G3/20 ,  G09G3/36 ,  G11C29/00

Abstract: A matrix addressed display system designed so as to enable data line (22) repair by electronic mechanisms which is efficient and low in cost and thus increases yield. Such active data line (22) repair utilizes additional data driver (36) outputs, a defect map memory (48) in the TFT/LCD module and modification of the data stream to the data drivers (36) by additional circuits (42) between the display and the display adapter. A bus configuration on the display substrate is utilized which combines repair flexibility, low parasitic capacitance, and the ability to easily make the necessary interconnections. The number of interconnections is kept to a minimum, the connections are reliable, and the connections may be made with conventional wire bond or laser bond technology, or disk bond technology.

公开(公告)号：CA2168285A1

公开(公告)日：1996-09-04

申请号：CA2168285

申请日：1996-01-29

Applicant: IBM

Inventor： NARAYAN CHANDRASEKHAR ,  SHAW JANE M

IPC: H05K3/46 ,  H05K1/00 ,  H05K3/00 ,  H05K1/02 ,  H05K1/03

Abstract: The present invention provides a wiring module containing a plurality of laminated polymer layers containing defined electronic circuitry which can be thermoformed into desired three dimensional shapes without damaging the internal wiring at the region of thermoform stress. More particularly, the invention provides a thermoformed, three dimensional wiring module prepared by thermoforming a laminate comprising a plurality of laminated, thermoformable polymer insulating layers containing conductive wiring circuitry on at least one surface of the layers, the layers being assembled to form conductive interconnect paths within the module, the module further characterized in that the conductive wiring circuitry is present only on internal low stress layers of the laminate at the region of thermoformed bends present in the module.