公开(公告)号：DE10021776A1

公开(公告)日：2001-11-22

申请号：DE10021776

申请日：2000-05-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FISCHER HELMUT ,  SCHNEIDER HELMUT ,  SCHOENINGER SABINE ,  MARKERT MICHAEL

IPC: G11C7/06 ,  G11C11/4091

Abstract: At least one of the drive transistors (N1, P1) is arranged with its doping areas between the associated NMOS or PMOS transistors of the read/write amplifiers (N2, N3, P2, P3), and the gate of these drive transistors (N1, P1) is constructed as a two-strip gate (N111, P111).

公开(公告)号：DE10057489B4

公开(公告)日：2007-05-24

申请号：DE10057489

申请日：2000-11-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FISCHER HELMUT ,  SCHNABEL JOACHIM

IPC: G11C8/00 ,  G11C8/10 ,  G11C11/415

公开(公告)号：DE10219066B4

公开(公告)日：2006-12-14

申请号：DE10219066

申请日：2002-04-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFEIFFER JOHANN ,  FISCHER HELMUT

IPC: G11C7/00 ,  G11C7/10 ,  G11C7/22 ,  G11C11/407 ,  G11C11/4076 ,  G11C11/4096

Abstract: The circuit has memory cells, an addressing device and a controller (91,92) for activating a selected word line and initiating connection of a selected read amplifier (51) to a data path (70,87,88). The controller can be set up by an immediate write command to (SSM) initiate connection of the selected read amplifier to the data path at a time after activation of the selected word line (WL) less than the memory circuit's specific charging time.

公开(公告)号：DE10149098B4

公开(公告)日：2006-05-24

申请号：DE10149098

申请日：2001-10-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFEIFFER JOHANN ,  FISCHER HELMUT

IPC: G11C7/12 ,  G11C7/10 ,  G11C7/18 ,  G11C11/4094 ,  G11C11/4097

公开(公告)号：DE102004024082A1

公开(公告)日：2005-12-08

申请号：DE102004024082

申请日：2004-05-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DICKMANN RORY ,  FISCHER HELMUT

IPC: H03F1/30 ,  H03F3/45

公开(公告)号：DE10146084B4

公开(公告)日：2005-08-25

申请号：DE10146084

申请日：2001-09-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MORGAN ALAN ,  FISCHER HELMUT

IPC: G11C29/34 ,  G11C29/00

公开(公告)号：DE10226057B3

公开(公告)日：2004-02-12

申请号：DE10226057

申请日：2002-06-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SOMMER MICHAEL ,  FISCHER HELMUT

IPC: G11C5/14 ,  G11C11/4074

公开(公告)号：DE10219066A1

公开(公告)日：2003-11-13

申请号：DE10219066

申请日：2002-04-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFEIFFER JOHANN ,  FISCHER HELMUT

IPC: G11C7/10 ,  G11C7/22 ,  G11C11/4076 ,  G11C11/4096 ,  G11C11/407

Abstract: The circuit has memory cells, an addressing device and a controller (91,92) for activating a selected word line and initiating connection of a selected read amplifier (51) to a data path (70,87,88). The controller can be set up by an immediate write command to (SSM) initiate connection of the selected read amplifier to the data path at a time after activation of the selected word line (WL) less than the memory circuit's specific charging time.

公开(公告)号：DE10205196A1

公开(公告)日：2003-08-28

申请号：DE10205196

申请日：2002-02-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MORGAN ALAN ,  FISCHER HELMUT

IPC: G11C29/00

Abstract: An addressing device selects an element from a set of N regular elements or alternatively from a set of R

公开(公告)号：DE10139515C2

公开(公告)日：2003-07-31

申请号：DE10139515

申请日：2001-08-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FISCHER HELMUT ,  LINDOLF JUERGEN

IPC: G05F3/30 ,  H01L29/732 ,  H01L29/73 ,  H01L23/58 ,  G05F3/22

Abstract: A transistor configuration for a bandgap circuit is configured in the form of an npn transistor. An insulated p-type well, which is surrounded by a buried n-type well, is used as a base terminal. The n-type well constitutes the emitter terminal. A negatively doped region, which acts as a collector terminal, is formed in the p-type well. The structure that is used exists in DRAM processes, and it can therefore be used to form an npn transistor as a footprint diode in bandgap circuits.