-
公开(公告)号：JP2002093172A
公开(公告)日：2002-03-29
申请号：JP2001200241
申请日：2001-06-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor： BRASS ECKHARD , LE THOAI-THAI , LINDOLF JUERGEN , SCHNABEL JOACHIM
IPC: G11C11/409 , G11C5/14 , G11C7/06 , G11C7/22 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/4074 , H03K19/0175
Abstract: PROBLEM TO BE SOLVED: To supply or introduce control voltage caused by a refresh-current to differential amplifiers functioning as receivers respectively in order to introduce a right operation point. SOLUTION: A receiver circuit, especially, parts arranged in a circuit for switching between a standby mode and an operation mode.
-
公开(公告)号：JP2002063800A
公开(公告)日：2002-02-28
申请号：JP2001157851
申请日：2001-05-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor： BRASS ECKHARD , SCHAFFROTH THILO , SCHNABEL JOACHIM , SCHNEIDER HELMUT
Abstract: PROBLEM TO BE SOLVED: To provide a method for testing many word lines of a semiconductor memory assembly in a multiple WL wafer test in which a multiple wafer test can be performed quickly without needing much cost. SOLUTION: When an active word line(WL) is in a power-down state, a non-active word line is separated from negative VNWL voltage and made highly resistant immediately before the power-down of the active word line to prevent the rise of the non-active word line having negative voltage.
-
公开(公告)号：DE10214102B4
公开(公告)日：2007-08-09
申请号：DE10214102
申请日：2002-03-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor： SCHNABEL JOACHIM , HAUSMANN MICHAEL
IPC: G11C11/406
Abstract: The device has a variable periodic refresh input signal receiver, a comparator (22) for comparing the period of the refresh input signal (14) with a defined value, an output device (22) for outputting a refresh output signal (24) depending on the comparison and a reset signal (26). A maximum or minimum period signal is output if the period is above a maximum or below a minimum value respectively, otherwise a proportional period signal is output. AN Independent claim is also included for a method of outputting a refresh signal for a memory cell of a semiconducting memory device.
-
公开(公告)号：DE10243604B4
公开(公告)日：2006-07-27
申请号：DE10243604
申请日：2002-09-19
Applicant: INFINEON TECHNOLOGIES AG
Inventor： SCHNABEL JOACHIM , SCHAEFER ANDRE , OBERGRUSBERGER XAVER , MOSLER SEBASTIAN
IPC: H01L27/08 , H01L27/02 , H01L27/105 , H01L27/108 , H01L27/118
-
公开(公告)号：DE10214103A1
公开(公告)日：2003-10-23
申请号：DE10214103
申请日：2002-03-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor： SCHNABEL JOACHIM , SOMMER MICHAEL
IPC: G11C11/406 , H03K3/0231 , H03K3/017
Abstract: The device has a source for providing a current with a predetermined temperature-independent current magnitude, a source for providing a predetermined temperature-independent potential, a source for providing a temperature-dependent reference potential, a capacitor connected to the current source and voltage source for charging and a comparator that outputs a refresh signal if the capacitor voltage exceeds the reference potential. The device has a temperature-independent current source (13) for providing a current with a predetermined temperature-independent current magnitude, a temperature-independent voltage source (14) for providing a predetermined temperature-independent potential, a temperature-dependent reference voltage source (16) for providing a temperature-dependent reference potential, a capacitor (C) connected to the current source and voltage source for charging and a comparator (12) that outputs a refresh signal if the capacitor voltage exceeds the reference potential. AN Independent claim is also included for the following: a method of generating a refresh signal for a memory cell of a semiconducting memory device.
-
Patent Agency Ranking
公开(公告)号：DE10214102A1
公开(公告)日：2003-10-23
申请号：DE10214102
申请日：2002-03-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor： SCHNABEL JOACHIM , HAUSMANN MICHAEL
IPC: G11C11/406
Abstract: The device has a variable periodic refresh input signal receiver, a comparator (22) for comparing the period of the refresh input signal (14) with a defined value, an output device (22) for outputting a refresh output signal (24) depending on the comparison and a reset signal (26). A maximum or minimum period signal is output if the period is above a maximum or below a minimum value respectively, otherwise a proportional period signal is output. AN Independent claim is also included for a method of outputting a refresh signal for a memory cell of a semiconducting memory device.
-
公开(公告)号：DE10214101A1
公开(公告)日：2003-10-23
申请号：DE10214101
申请日：2002-03-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor： SCHNABEL JOACHIM , SCHAEFER ANDRE
IPC: G11C7/04 , G11C11/406 , H03K3/0231 , G11C11/4076 , H03L7/00 , H03K3/0232
Abstract: The device has a capacitor, a differential current source for providing a capacitor charging current with temperature dependent and temperature independent current sources connected together so the current level of the capacitor charging current is proportional to the difference between the temperature dependent and temperature independent currents. A comparator outputs a refresh signal if the capacitor voltage exceeds a reference voltage. The device has a capacitor (C), a differential current source (14) for providing a capacitor charging current for charging the capacitor with temperature dependent and temperature independent current sources that are connected together so that the current level of the capacitor charging current is proportional to the difference between the temperature dependent and temperature independent currents. A comparator (12) outputs a refresh signal if the capacitor voltage (VC) exceeds a reference voltage (VREF). AN Independent claim is also included for the following: an arrangement for implementing the inventive method of producing a refresh signal for a memory cell of a semiconducting memory device, preferably a DRAM memory.
-
公开(公告)号：DE102014103513A1
公开(公告)日：2014-09-18
申请号：DE102014103513
申请日：2014-03-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor： MAYER ALEXANDER , SCHNABEL JOACHIM
IPC: H03M1/06
Abstract: Schaltungsanordnung (100), welche einen ersten Widerstand (202), einen zweiten Widerstand (204), eine Stromquelle (206) und einen Analog-Digital-Wandler (102) aufweist. Der zweite Widerstand (204) ist thermisch mit dem ersten Widerstand (202) gekoppelt. Die Stromquelle (206) ist mit dem zweiten Widerstand (204) gekoppelt. Der Analog-Digital-Wandler (102) ist dafür ausgelegt, eine über den ersten Widerstand (202) gemessene erste Spannung als eine zu digitalisierende Spannung zu empfangen und eine über den zweiten Widerstand (204) gemessene zweite Spannung als eine Referenzspannung des Analog-Digital-Wandlers (102) zu empfangen.
-
公开(公告)号：DE10219783B4
公开(公告)日：2005-02-03
申请号：DE10219783
申请日：2002-05-03
Applicant: INFINEON TECHNOLOGIES AG
Inventor： HAUSMANN MICHAEL , SCHNABEL JOACHIM
IPC: H02M3/07
Abstract: A method for increasing the external supply voltage (Vext) of an integrated circuit, using a two-stage charge pump (A,B) to transform the external supply voltage (Vext) on to a higher internal working voltage (Vpp). Two two-stage pumps (A,B) work in parallel in one multi-phase drive, where in a cyclic sequence the two pumps (A,B) work on a common first stage. An Independent claim is given for an integrated circuit.
-
公开(公告)号：DE50101888D1
公开(公告)日：2004-05-13
申请号：DE50101888
申请日：2001-07-12
Applicant: INFINEON TECHNOLOGIES AG
Inventor： FISCHER DR , SCHNABEL JOACHIM
Abstract: The circuit has a control stage that produces a deactivation control signal in response to a deactivation command to set a controllable connection device in the conducting state. A selectively switched reducing device limits the current flowing via the conducting connecting device in the on state so that the total current flowing in a common line system providing a deactivation potential does not exceed a defined value. The circuit has a control stage (2) that produces a deactivation control signal in response to a deactivation command to set a controllable connection device (T2), which is provided for each word line (WL) for connecting it to a common line system (DL) for providing a deactivation potential, in the conducting state. A selectively switched reducing device (T7-T9, HL) limits the current flowing via the conducting connecting device in the on state so that the total current flowing in the common line system does not exceed a defined value.
-
-
-
-
-
-
-
-
-
Search Results
40
records
(took 0.024 seconds)
