公开(公告)号：US20240215150A1

公开(公告)日：2024-06-27

申请号：US18423227

申请日：2024-01-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHUN-WEI CHANG ,  JIAN-HONG LIN ,  SHU-YUAN KU ,  WEI-CHENG LIU ,  YINLUNG LU ,  JUN HE

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K1/0242 ,  H05K1/0251 ,  H05K1/116 ,  H05K3/427 ,  H05K3/429 ,  H05K2201/0776

Abstract: A package component includes a first substrate and a first conductive layer. The first substrate has a first surface and a second surface opposite to the first surface. The first conductive layer is disposed over the first surface of the first substrate. The first conductive layer includes a first conductive feature and a second conductive feature over the first conductive feature. The second conductive features covers a portion of the first conductive feature. A resistance of the second conductive feature is lower than a resistance of the second conductive feature. The first substrate includes a single-sided or a double-sided copper-clad laminate.

公开(公告)号：US20240196515A1

公开(公告)日：2024-06-13

申请号：US18306874

申请日：2023-04-25

Applicant: SK hynix Inc.

Inventor： Jae Hoon LEE ,  Jong Wook KIM ,  Ju Il EOM

IPC: H05K1/02 ,  H05K1/09 ,  H05K1/11

CPC classification number: H05K1/0213 ,  H05K1/09 ,  H05K1/111 ,  H05K1/115 ,  H05K2201/0776

Abstract: A substrate in accordance with an embodiment of the disclosure includes a signal transmission layer including a signal transmission pad and a signal transmission interconnection; a first dielectric layer stacked on the signal transmission layer; and a first reference voltage layer stacked on the first dielectric layer. The first reference voltage layer includes a first space hole and an impedance calibrator. The impedance calibrator includes an impedance calibration part disposed in the first space hole; and a first bridge connecting a first portion of the impedance calibration part to a first portion of the first reference voltage layer.

公开(公告)号：US11751325B2

公开(公告)日：2023-09-05

申请号：US16928069

申请日：2020-07-14

Applicant: Sony Olympus Medical Solutions Inc.

Inventor： Kiyotaka Kanno

IPC: H05K1/02 ,  G02B23/24 ,  A61B1/00 ,  H05K1/18 ,  A61B1/04 ,  H04N23/00 ,  A61N1/372 ,  H01Q1/22 ,  H01Q21/28

CPC classification number: H05K1/0262 ,  A61B1/00124 ,  A61B1/04 ,  A61N1/37229 ,  G02B23/24 ,  H01Q1/2283 ,  H01Q21/28 ,  H04N23/00 ,  H05K1/0215 ,  H05K1/185 ,  H05K2201/0776

Abstract: A substrate for a medical device, a portion of which is brought into contact with or inserted into a subject. The substrate includes a patient circuit conductively connected to the portion that is configured to be brought into contact with or inserted into the subject, and a ground-side circuit configured to perform at least one of transmission of a signal, reception of a signal, and supply of electric power on the patient circuit. The ground-side circuit is grounded by a protective ground to ensure safety of a manipulator of the medical device. The substrate also includes an insulating layer between the patient circuit and the ground-side circuit providing insulation between the patient circuit and the ground-side circuit, and an isolated circuit provided apart from the patient circuit and the ground-side circuit on the insulating layer and having a different reference potential from the patient circuit and the ground-side circuit.

公开(公告)号：US09622344B2

公开(公告)日：2017-04-11

申请号：US14391748

申请日：2013-02-28

Applicant: KABUSHIKI KAISHA NIHON MICRONICS

Inventor： Tatsuo Inoue ,  Takayasu Sugai ,  Toshiyuki Kudo ,  Toshinori Omori

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/09

CPC classification number: H05K1/0298 ,  H05K1/0233 ,  H05K1/0242 ,  H05K1/025 ,  H05K1/09 ,  H05K3/46 ,  H05K2201/0154 ,  H05K2201/0338 ,  H05K2201/0391 ,  H05K2201/0776 ,  H05K2201/0792 ,  H05K2201/083 ,  Y10T29/49155

Abstract: A multi-layer wiring board includes wiring layers stacked on a substrate with an insulating layer between each layer. A wire formed in the wiring layer consists of a first layer and a second layer to form a double layered structure. The first layer is made of a first conductive material and the second layer is made of a second conductive material having relative magnetic permeability of 10 or more and larger than that of the first conductive material. The characteristic impedance of the wire is adjusted to a value closer to 50 ohms than that of a wire which has the same thickness as of the wire with the double layered structure, and is made only of the first conductive material.

公开(公告)号：US09572252B2

公开(公告)日：2017-02-14

申请号：US14444135

申请日：2014-07-28

Applicant: TOPPAN PRINTING CO., LTD. ,  NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY

Inventor： Tetsuyuki Tsuchida ,  Toshikazu Okubo ,  Ikuo Shohji ,  Takahiro Kano

IPC: B05D5/12 ,  B28B19/00 ,  C23C18/00 ,  H01C17/06 ,  H05K3/00 ,  H05K1/09 ,  C23C18/36 ,  C23C18/44 ,  C23C18/16 ,  H05K3/24 ,  C23C18/50

CPC classification number: H05K1/09 ,  C23C18/1651 ,  C23C18/36 ,  C23C18/44 ,  C23C18/50 ,  H05K3/243 ,  H05K3/244 ,  H05K2201/032 ,  H05K2201/0776 ,  H05K2203/072

Abstract: A wiring substrate includes an electrode including Cu or a Cu alloy, and a plated film including an electroless nickel-plated layer formed on the electrode and an electroless gold-plated layer formed on the electroless nickel-plated layer. The electroless nickel-plated layer is formed by co-precipitation of Ni, P, Bi, and S, the electroless nickel-plated layer includes a content of P of 5% by mass or more and less than 10% by mass, a content of Bi of 1 ppm by mass to 1,000 ppm by mass, and a content of S of 1 ppm by mass to 2,000 ppm by mass, and a mass ratio of the content of S to the content of Bi (S/Bi) is more than 1.0.

Abstract translation: 布线基板包括包含Cu或Cu合金的电极和形成在电极上的化学镀镍层和形成在化学镀镍层上的化学镀金层的镀膜。 化学镀镍层通过Ni，P，Bi和S的共沉淀形成，无电镀镍层的P含量为5质量％以上且小于10质量％，含量 的Bi为1质量ppm〜1000质量ppm，S为1质量ppm〜2000质量ppm，S含量与Bi（S / Bi）含量的质量比为更多 比1.0。

公开(公告)号：US20140332259A1

公开(公告)日：2014-11-13

申请号：US14444135

申请日：2014-07-28

Applicant: TOPPAN PRINTING CO., LTD. ,  NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY

Inventor： Tetsuyuki TSUCHIDA ,  Toshikazu OKUBO ,  Ikuo SHOHJI ,  Takahiro KANO

IPC: H05K1/09 ,  C23C18/36 ,  H05K3/24

CPC classification number: H05K1/09 ,  C23C18/1651 ,  C23C18/36 ,  C23C18/44 ,  C23C18/50 ,  H05K3/243 ,  H05K3/244 ,  H05K2201/032 ,  H05K2201/0776 ,  H05K2203/072

Abstract: A wiring substrate includes an electrode including Cu or a Cu alloy, and a plated film including an electroless nickel-plated layer formed on the electrode and an electroless gold-plated layer formed on the electroless nickel-plated layer. The electroless nickel-plated layer is formed by co-precipitation of Ni, P, Bi, and S, the electroless nickel-plated layer includes a content of P of 5% by mass or more and less than 10% by mass, a content of Bi of 1 ppm by mass to 1,000 ppm by mass, and a content of S of 1 ppm by mass to 2,000 ppm by mass, and a mass ratio of the content of S to the content of Bi (S/Bi) is more than 1.0.

Abstract translation: 布线基板包括包含Cu或Cu合金的电极和形成在电极上的化学镀镍层和形成在化学镀镍层上的化学镀金层的镀膜。 化学镀镍层通过Ni，P，Bi和S的共沉淀形成，无电镀镍层的P含量为5质量％以上且小于10质量％，含量 的Bi为1质量ppm〜1000质量ppm，S为1质量ppm〜2000质量ppm，S含量与Bi（S / Bi）含量的质量比为更多 比1.0。

公开(公告)号：WO2017212451A1

公开(公告)日：2017-12-14

申请号：PCT/IB2017/053423

申请日：2017-06-09

Applicant: TE CONNECTIVITY CORPORATION

Inventor： SMITH, JR., Graham Harry ,  WALTON, Scott Eric ,  CINA, Michael Frank

IPC: H05K1/11 ,  H01R12/72 ,  H01P5/02 ,  H05K1/02

CPC classification number: H01R12/721 ,  H01P5/028 ,  H01R13/112 ,  H05K1/025 ,  H05K1/0251 ,  H05K1/115 ,  H05K1/117 ,  H05K2201/0776 ,  H05K2201/09381 ,  H05K2201/09481 ,  H05K2201/09618 ,  H05K2201/09672 ,  H05K2201/09727 ,  H05K2201/0979

Abstract: An electrical contact pad (300) for electrically contacting a connector includes first (302), second (305) and third regions (310). The first region (302) is connected to a trace (325). The second region (305) is adjacent to the first region (302) and has a width (W2) less than the first region (W1). The third region (310) is adjacent to the second region (305) and has a width (W3) that is greater than the second region (W2). The third region (310) is sized to make contact with a connector. Having the width of the second region (W2) be smaller than the width of the first (W1) and third regions (W3) increases an impedance of the electrical contact pad (300).

Abstract translation: 用于电连接连接器的电接触垫（300）包括第一（302），第二（305）和第三区域（310）。 第一区域（302）连接到迹线（325）。 第二区域（305）与第一区域（302）相邻并且具有小于第一区域（W1）的宽度（W2）。 第三区域（310）与第二区域（305）相邻并且具有比第二区域（W2）大的宽度（W3）。 第三区域（310）的尺寸被确定为与连接器接触。 使第二区域（W2）的宽度小于第一区域（W1）和第三区域（W3）的宽度增加了电接触垫（300）的阻抗。

公开(公告)号：WO2016067716A1

公开(公告)日：2016-05-06

申请号：PCT/JP2015/073255

申请日：2015-08-19

Applicant: ソニー・オリンパスメディカルソリューションズ株式会社

Inventor： 菅野　清貴

IPC: A61B1/04 ,  G02B23/24 ,  H04N5/225

CPC classification number: H01Q1/2283 ,  A61B1/04 ,  A61N1/37229 ,  G02B23/24 ,  H01Q21/28 ,  H04N5/225 ,  H05K1/0215 ,  H05K1/185 ,  H05K2201/0776

Abstract: 　患者回路の基準電位を安定させ、患者回路と接地側回路との間のノイズを低減することができるとともに、大型の電子部品を使用することなく、患者回路と接地側回路との絶縁距離を十分に確保することができる医療機器用基板および医療機器を提供する。　被検体に接触または挿入される側の回路である患者回路と、被検体に接触または挿入される側から伝送される信号に対して処理を施す側の回路であって保護接地された回路である接地側回路と、患者回路と接地側回路との間に設けられ、患者回路と接地側回路を絶縁する絶縁層と、絶縁層の表面に患者回路および接地側回路から離間して設けられ、患者回路および接地側回路と基準電位が異なる孤立回路と、を備える。

Abstract translation: 提供了一种可以使患者电路的基准位置稳定并且降低病人电路和接地侧电路之间的噪声的医疗设备基板和医疗设备，并且可以充分地确保患者电路和地面侧电路之间的绝缘距离， 侧电路不使用大型电子元件。 本发明包括：患者回路，其是与被检者对接或插入的一侧的电路; 接地侧电路，其是保护性接地的电路，并且处于从与被检体接触或插入的一侧发送的信号的一侧; 绝缘层，设置在患者电路和接地侧电路之间，并且使患者电路和接地侧电路彼此绝缘; 以及设置在绝缘层的表面上以与患者电路和接地侧电路分离并且具有与患者电路和接地侧电路不同的参考电位的隔离电路。

公开(公告)号：WO2017083014A1

公开(公告)日：2017-05-18

申请号：PCT/US2016/053057

申请日：2016-09-22

Applicant: INTEL CORPORATION

Inventor： LAMBERT, William J. ,  MANUSHAROW, Mathew J.

IPC: H01G2/06 ,  H01G4/232 ,  H01G4/30 ,  H05K1/18

CPC classification number: H05K1/116 ,  H05K1/0234 ,  H05K1/115 ,  H05K1/181 ,  H05K3/0047 ,  H05K3/32 ,  H05K3/4069 ,  H05K3/4084 ,  H05K3/4644 ,  H05K2201/0329 ,  H05K2201/0391 ,  H05K2201/0776 ,  H05K2201/09627 ,  H05K2201/10015 ,  H05K2203/14

Abstract: Discussed generally herein are methods and devices for altering an effective series resistance (ESR) of a component. A device can include a substrate including electrical connection circuitry therein, a first via hole through a first surface of the substrate and contiguous with the electrical connection circuitry, a first conductive polymer with a resistance greater than a resistance of the electrical connection circuitry filling the first via hole, and a component electrically coupled to the first conductive polymer.

Abstract translation: 本文通常讨论用于改变组件的有效串联电阻（ESR）的方法和设备。 器件可以包括其中包括电连接电路的衬底，穿过衬底的第一表面并邻接电连接电路的第一过孔，电阻大于电连接电路的电阻的第一导电聚合物填充第一 通孔以及电耦合到第一导电聚合物的组件。

公开(公告)号：WO2015002515A1

公开(公告)日：2015-01-08

申请号：PCT/KR2014/006040

申请日：2014-07-07

Applicant: 주식회사 잉크테크

Inventor： 정광춘 ,  유지훈 ,  성준기 ,  김병훈 ,  조남부 ,  유명봉

IPC: H01B13/00 ,  H01B5/14

CPC classification number: H05K1/0274 ,  G06F3/041 ,  G06F2203/04103 ,  H01L51/445 ,  H05K1/0213 ,  H05K1/0289 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/032 ,  H05K1/034 ,  H05K1/0346 ,  H05K1/097 ,  H05K3/0026 ,  H05K3/06 ,  H05K3/067 ,  H05K3/12 ,  H05K3/1258 ,  H05K2201/0776 ,  Y02E10/549 ,  Y02P70/521

Abstract: 본 발명은 전도성 투명기판 제조방법에 관한 것이며, 본 발명의 전도성 투명기판 제조방법은 기판 상에 상호 이격되도록 배열되는 복수개의 주전극을 형성하는 주전극 형성단계; 복수개의 주전극이 서로 전기적으로 단절되는 복수개의 그룹전극으로 그룹화되도록 둘 이상의 주전극을 전기적으로 연결하는 연결전극을 형성하는 연결전극 형성단계;를 포함하는 것을 특징으로 한다. 따라서, 본 발명에 의하면, 투과성이 우수한 전도성 투명기판을 높은 수율의 공정을 통하여 제작할 수 있는 전도성 투명기판 제조방법 및 전도성 투명기판이 제공된다.

Abstract translation: 导电性透明基板的制造方法技术领域本发明涉及导电性透明基板的制造方法，其特征在于，具备：主电极形成工序，其形成配置在基板上的多个主电极彼此间隔开; 以及连接电极形成步骤，用于形成用于电连接两个或更多个主电极的连接电极，使得所述多个主电极被分组成彼此电切断的多个组电极。 因此，根据本发明，提供了能够通过高产率的工艺制造具有优异的透射率的导电透明基板和导电性透明基板的导电性透明基板的制造方法。