公开(公告)号：DE10152636A1

公开(公告)日：2003-01-30

申请号：DE10152636

申请日：2001-10-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KROENKE MATTHIAS ,  BRUCHHAUS RAINER ,  ENDERS GERHARD ,  HARTNER WALTER ,  MIKOLAJICK THOMAS ,  NAGEL NICOLAS ,  ROEHNER MICHAEL

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/108 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11507

Abstract: Semiconductor memory has capacitor devices (10-1,...., 10-4) each vertically extending from a substrate (20) and/or a passivating region (21) and/or a surface region (20a). A three dimensional arrangement or structure is formed for each capacitor device. An Independent claim is also included for a process for the production of a semiconductor memory. Preferred Features: The capacitor devices each have a first electrode arrangement (14), a second electrode arrangement (18) with a dielectric (16) arranged between the arrangements. The capacitor devices are a stacked structure of form part of a stacked structure.

公开(公告)号：DE10131626A1

公开(公告)日：2003-01-30

申请号：DE10131626

申请日：2001-06-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KROENKE MATTHIAS ,  BRUCHHAUS RAINER ,  ENDERS GERHARD ,  HARTNER WALTER ,  MIKOLAJICK THOMAS ,  NAGEL NICOLAS ,  ROEHNER MICHAEL

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11507 ,  H01L21/8239

Abstract: Production of a semiconductor memory comprises forming a semiconductor substrate (20), a passivating region (21) and/or a surface region (20a,21a) having a CMOS structure; forming capacitor arrangements (10-1, ..., 10-4) in the region of the substrate, passivating region and/or surface region; and providing first and second contact regions or plug regions (P1, P2) to contact with the capacitor arrangements. Preferred Features: The contact regions or plug regions are formed after forming the CMOS structure. Each capacitor arrangement has a first lower or bottom electrode device (14), a second upper or top electrode arrangement (18), and a dielectric (16) formed between the two electrode arrangements.

公开(公告)号：DE10131490A1

公开(公告)日：2003-01-16

申请号：DE10131490

申请日：2001-06-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KROENKE MATTHIAS ,  BRUCHHAUS RAINER ,  ENDERS GERHARD ,  HARTNER WALTER ,  MIKOLAJICK THOMAS ,  NAGEL NICOLAS ,  ROEHNER MICHAEL

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8239

Abstract: Production of capacitor arrangement comprises: removing lower layer (14) of a sequence of layers (14, 16) formed in surface region (20a) of semiconductor substrate (20) or passivating region (21) outside a region of predefined sites (K2) up to a reduced layer thickness (d); forming raised region (E) of lower layer; and forming subsequent layer (16) on lower layer, especially in the raised region. Preferred Features: The lower layer is removed by local deposition and/or local formation of a mask in the region of the predefined sites on the lower layer and by etching in the region of the mask. The layers of the layer sequence are applied in a common process step on the surface region of the substrate or on the passivating region, and then etched in a common process step and/or structured and/or after tempering.

公开(公告)号：DE10114406A1

公开(公告)日：2002-10-02

申请号：DE10114406

申请日：2001-03-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KROENKE MATTHIAS ,  KASKO IGOR

IPC: H01L27/105 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8246 ,  H01L21/8247

Abstract: The invention relates to a method for producing ferroelectric memory cells in accordance with the stack principle. According to said method, an adhesive layer (2, 3) is formed between a lower capacitor electrode (6) of a memory capacitor and a conductive plug (1), which is formed below said electrode and makes an electric connection between said capacitor electrode (6) and a transistor electrode of a selection transistor that is formed in or on a semiconductor wafer. An oxygen diffusion barrier (4, 5) is formed above the adhesive layer and once the ferroelectric has been deposited, the adhesive layer and the barrier are subjected to rapid thermal processing (RTP) in an oxygen atmosphere. The method is characterised by the following steps: (A) Determination of the oxygen speed of the adhesive layer (2, 3) and the diffusion coefficient (DOxygen(T)) of oxygen in the material of the adhesive layer (2, 3), dependent on the temperature (T); (B) Determination of the diffusion coefficient (DSilicon(T)) of silicon in the material of the adhesive layer (2, 3), dependent on the temperature and (C) Calculation of an optimal temperature range for the RTP step from the two diffusion coefficients, (DOxygen(T)) and (DSilicon(T)) that have been determined for a predetermined layer thickness (dBARR) and layer width (bBARR) of the layer system consisting of the adhesive layer and the oxygen diffusion barrier, so that during the RTP step the siliconisation of the adhesive layer occurs more rapidly than its oxidation.

公开(公告)号：DE10058965A1

公开(公告)日：2002-06-13

申请号：DE10058965

申请日：2000-11-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  KROENKE MATTHIAS

IPC: G11C7/20 ,  G11C11/404 ,  G11C11/4063

Abstract: The RAM memory has a number of memory cells whose logical state can be varied by a control voltage. At least some memory cells include an additional device that can be activated by a forced control voltage that is different from the control voltage in order to impose a defined logical state on the memory cells.

公开(公告)号：DE10057444A1

公开(公告)日：2002-05-29

申请号：DE10057444

申请日：2000-11-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTNER WALTER ,  WEINRICH VOLKER ,  KROENKE MATTHIAS

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/8239

Abstract: Production of a capacitor arrangement comprises filling exposed intermediate regions (24) of the surface (21) of the substrate (20) with an electrically insulating intermediate layer (30) up to the level of an upper layer (18) of a capacitor device (10). Preferred Features: A contact layer (50) is applied and/or structured on the intermediate layer to provide an electrical contact with the upper layer of the capacitor device.