Abstract:
PROBLEM TO BE SOLVED: To provide a method for manufacturing a conducting connection which permits the number of processes to be held as small as possible, or rather to be reduced, without such problems as overetching of trenches and dielectric close-off. SOLUTION: A semiconductor substrate having at least one insulation layer is prepared. A mask is formed on the upper face of the insulation layer, and then an isotropic etching process is mainly conducted, and then an anisotropic etching is mainly conducted until reaching the lower face of the insulation film and thereby forming a contact hole. Then, the mask is removed and the contact hole is filled with a first conductive material. The first conductive material is etched back to a specified depth, and then a free region of the contact hole is filled with at least one kind of second conductive material.
Abstract:
PROBLEM TO BE SOLVED: To provide the manufacturing method of constituents improved in the adhesion of a noble metal layer to an insulation layer. SOLUTION: The method for improving adhesion between the noble metal layer (28) and the insulation layer (34) is proposed. In this method, a silicon layer is provided between the noble metal layer (28) and the insulation layer (34). The silicon layer is salicided and oxidized by applying heat treatment in an atmosphere where oxygen is present. In this case, an oxidized silicon layer (30'), effecting strong mixture of the noble metal and the formed oxide, is produced. Adhesion of the noble metal layer (28) to the insulation layer (34) is improved, based on a comparatively large internal surface acquired by this method. COPYRIGHT: (C)2003,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide an executable method of manufacturing, with only a little labor, a ferroelectric-material capacitor having two pieces or more of withstand voltage which are different from each other. SOLUTION: First, a first electrode structure 11 having the surface which forms at least two-height levels is formed on a substrate 1, a ferroelectric- material layer 13 having a variety of layer thickness is laminated on the first electrode structure 11 by spin coating, and in succession, a second electrode structure 12 is formed on the ferroelectric-material layer 13.
Abstract:
PROBLEM TO BE SOLVED: To provide a method of manufacturing a structured metal oxide containing layer. SOLUTION: The method comprises the processing steps of preparing a substrate, covering a metal oxide containing layer on the substrate, structuring the metal oxide containing layer, and covering a repair layer covering at least edges of the metal oxide containing layer, and the repair layer contains at least one kind of element which is contained in the metal oxide containing layer but lacks in the stoichiometric composition at the edges due to structuring, and is heat-treated so as to diffuse the element from the repair layer at damaged regions of the edges of the metal oxide containing layer.
Abstract:
The invention relates to a method of producing a high-epsilon dielectric/ferroelectric capacitor. According to the inventive method, a structural layer (10) with a central base-layer zone (11) and a trench (13) that is filled with Si and that laterally surrounds said layer is produced. A metal layer (14) is deposited on said layer and is siliconized above the Si-filled trench (13). When the siliconized metal layer section (18) is oxidized, it migrates into the trench (13), thereby forming a base electrode (19) above the base-layer zone (11).
Abstract:
The invention relates to a method for fabricating a semiconductor memory component, in particular a DRAM or FeRAM having a silicon substrate. The lower electrode of a storage capacitor is insulated from the silicon substrate by a barrier layer. The barrier layer is patterned using a hard mask, in particular, made from SiO2, SiN, SiON, before the storage capacitor is applied, and the mask layer which remains after the patterning is removed so as to uncover the patterned barrier layer. The invention provides for the patterned barrier layer to be embedded in SiO2 by means of CVD (chemical vapor deposition) prior to the removal of the remaining mask layer, and for the remaining mask layer, together with the SiO2 embedding, to be removed from the surface of the barrier layer using an SiO2-CMP (chemical mechanical polishing) process.
Abstract:
A method for improving the adhesion between a noble metal layer and an insulation layer includes configuring a silicon layer between the noble metal layer and the insulation layer. The silicon layer is siliconized and oxidized by a thermal treatment in an oxidative environment, resulting in an oxidized silicide layer with high intermixing of the noble metal and the formed oxide. The relatively large inner surface achieved as a result improves the adhesion between the noble metal layer and the insulation layer.