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公开(公告)号：US11362057B2
公开(公告)日：2022-06-14
申请号：US16687557
申请日：2019-11-18
Applicant: Unimicron Technology Corp.
Inventor： Pu-Ju Lin , Cheng-Ta Ko , Ra-Min Tain , Tzyy-Jang Tseng
IPC: H01L23/00 , H01L23/538 , H01L25/065
Abstract: A chip package structure includes a substrate, at least two chips, a plurality of first pads, a plurality of first micro bumps, and a bridging element. The substrate has a first surface and a second surface opposite to the first surface. The two chips are disposed on the first surface of the substrate and are horizontally adjacent to each other. Each chip has an active surface. The first pads are disposed on the active surface of each of the chips. The first micro bumps are disposed on the first pads and have the same size. The bridging element is disposed on the first micro bumps such that one of the chips is electrically connected to another of the chips through the first pads, the first micro bumps, and the bridging element.
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公开(公告)号：US20220108953A1
公开(公告)日：2022-04-07
申请号：US17314055
申请日：2021-05-07
Applicant: Unimicron Technology Corp.
Inventor： John Hon-Shing Lau , Cheng-Ta Ko , Pu-Ju Lin , Tzyy-Jang Tseng , Ra-Min Tain , Kai-Ming Yang
IPC: H01L23/538 , H01L25/065 , H01L23/00 , H01L25/00 , H01L21/48
Abstract: A package structure, including a bridge, an interposer, a first redistribution structure layer, a second redistribution structure layer, and multiple chips, is provided. The bridge includes a silicon substrate, a redistribution layer, and multiple bridge pads. The interposer includes an intermediate layer, multiple conductive vias, multiple first pads, and multiple second pads. The bridge is embedded in the intermediate layer. The bridge pads are aligned with the upper surface. The first redistribution structure layer is disposed on the upper surface of the interposer and is electrically connected to the first pads and the bridge pads. The second redistribution structure layer is disposed on the lower surface of the interposer and is electrically connected to the second pads. The chips are disposed on the first redistribution structure layer and are electrically connected to the first redistribution structure layer. The chips are electrically connected to each other through the bridge.
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公开(公告)号：US20220108934A1
公开(公告)日：2022-04-07
申请号：US17206108
申请日：2021-03-18
Applicant: Unimicron Technology Corp.
Inventor： Ra-Min Tain , Po-Hsiang Wang , Chi-Chun Po
IPC: H01L23/367 , H01L23/31 , H01L23/373 , H01L23/00 , H01L25/065
Abstract: A package structure includes a first circuit board, a second circuit board, at least one electronic component, at least one conductive lead, and a molding compound. The first circuit board includes a first circuit layer and a second circuit layer. The second circuit board includes a third circuit layer and a fourth circuit layer. The electronic component is disposed between the first circuit board and the second circuit board. The conductive lead contacts at least one of the second circuit layer and the third circuit layer. The conductive lead has a vertical height, and the vertical height is greater than a vertical distance between the second circuit layer and the third circuit layer. The molding compound covers the first circuit board, the second circuit board, the electronic component, and the conductive lead. The molding compound exposes the first circuit layer and the fourth circuit layer, and the conductive lead extends outside the molding compound.
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公开(公告)号：US20220095464A1
公开(公告)日：2022-03-24
申请号：US17224078
申请日：2021-04-06
Applicant: Unimicron Technology Corp.
Inventor： Pei-Wei Wang , Shao-Chien Lee , Ra-Min Tain , Chi-Chun Po , Po-Hsiang Wang , Pei-Chang Huang , Chin-Min Hu
Abstract: A circuit board includes a composite structure layer, at least one conductive structure, a thermally conductive substrate, and a thermal interface material layer. The composite structure layer has a cavity and includes a first structure layer, a second structure layer, and a connecting structure layer. The first structure layer includes at least one first conductive member, and the second structure layer includes at least one second conductive member. The cavity penetrates the first structure layer and the connecting structure layer to expose the second conductive member. The conductive structure at least penetrates the connecting structure layer and is electrically connected to the first conductive member and the second conductive member. The thermal interface material layer is disposed between the composite structure layer and the thermally conductive substrate, and the second structure layer is connected to the thermally conductive substrate through the thermal interface material layer.
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公开(公告)号：US20220071015A1
公开(公告)日：2022-03-03
申请号：US17191559
申请日：2021-03-03
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Shao-Chien Lee , John Hon-Shing Lau , Chen-Hua Cheng , Ra-Min Tain
Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.
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Patent Agency Ranking
公开(公告)号：US20220065897A1
公开(公告)日：2022-03-03
申请号：US17342550
申请日：2021-06-09
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , John Hon-Shing Lau , Kuo Ching Tien , Ra-Min Tain
Abstract: A probe card testing device includes a first sub-circuit board, a second sub-circuit board, a connecting structure layer, a fixing plate, a probe head and a plurality of conductive probes. The first sub-circuit board is electrically connected to the second sub-circuit board by the connecting structure layer. The fixing plate is disposed on the second sub-circuit board and includes an opening and an accommodating groove. The opening penetrates the fixing plate and exposes a plurality of pads on the second sub-circuit board. The accommodating groove is located on a side of the fixing plate relatively far away from the second sub-circuit board and communicates with the opening. The probe head is disposed in the accommodating groove of the fixing plate. The conductive probes are set on the probe head and in the opening of the fixing plate. One end of the conductive probes is in contact with the corresponding pads, respectively.
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公开(公告)号：US20210251107A1
公开(公告)日：2021-08-12
申请号：US17017702
申请日：2020-09-11
Applicant: Unimicron Technology Corp.
Inventor： Ra-Min Tain , Pu-Ju Lin , Cheng-Chung Lo , Chi-Hai Kuo , Cheng-Ta Ko , Tzyy-Jang Tseng , John Hon-Shing Lau
Abstract: A vapor chamber structure includes a thermally conductive housing, a capillary structure layer, a grid structure layer, and a working fluid. The thermally conductive housing has a sealed chamber, where a pressure in the sealed chamber is lower than a standard atmospheric pressure. The capillary structure layer is disposed in the sealed chamber. The grid structure layer is disposed in the sealed chamber and arranged along a first direction. A size of the grid structure layer is less than or equal to a size of the capillary structure layer. The working fluid fills the sealed chamber.
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公开(公告)号：US20210076508A1
公开(公告)日：2021-03-11
申请号：US16950910
申请日：2020-11-18
Applicant: Unimicron Technology Corp.
Inventor： Wei-Ti Lin , Chun-Hsien Chien , Chien-Chou Chen , Fu-Yang Chen , Ra-Min Tain
Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.
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公开(公告)号：US10888001B2
公开(公告)日：2021-01-05
申请号：US16244113
申请日：2019-01-10
Applicant: Unimicron Technology Corp.
Inventor： Wei-Ti Lin , Chun-Hsien Chien , Chien-Chou Chen , Fu-Yang Chen , Ra-Min Tain
IPC: H05K7/10 , H05K3/46 , H05K3/40 , H05K3/42 , H05K3/28 , H05K3/30 , H05K1/11 , H05K1/18 , H05K3/00
Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.
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公开(公告)号：US10685922B2
公开(公告)日：2020-06-16
申请号：US16240806
申请日：2019-01-07
Applicant: Unimicron Technology Corp.
Inventor： Pu-Ju Lin , Cheng-Ta Ko , Yu-Hua Chen , Tzyy-Jang Tseng , Ra-Min Tain
Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
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