公开(公告)号：WO2013109681A3

公开(公告)日：2014-02-27

申请号：PCT/US2013021825

申请日：2013-01-17

Applicant: MICROCHIP TECH INC

Inventor： SCHIEKE PIETER

IPC: H02H9/04 ,  G06F1/30

CPC classification number: G06F1/30

Abstract: Monitoring of a core logic internal voltage regulator output is performed to detect, alarm and put an integrated circuit device into a safe mode when the voltage on the core logic exceeds a safe operating voltage value. This allows putting the integrated circuit devise into a predictable, detectable and safe mode, and to alarm the over-voltage condition to a system monitor to alert on a fault and subsequent fault disposition.

Abstract translation: 当核心逻辑电压超过安全工作电压值时，执行监控核心逻辑内部稳压器输出以检测，报警和将集成电路器件置于安全模式。 这样可以将集成电路设计成可预测的，可检测的和安全的模式，并将过电压状态报警给系统监视器，以便对故障和随后的故障处理进行警报。

公开(公告)号：WO2013085992A3

公开(公告)日：2014-02-06

申请号：PCT/US2012067944

申请日：2012-12-05

Applicant: MICROCHIP TECH INC

Inventor： KRIS BRYAN ,  TRIECE JOSEPH W ,  ROGERS CLARK J ,  SCHIEKE PIETER

IPC: H02M3/156 ,  G06F1/26

CPC classification number: G06F1/26 ,  G06F1/3203 ,  H02M2001/0045

Abstract: An integrated circuit device has a digital device (600) operating at an internal core voltage (Vint); a linear voltage regulator (510); and an internal switched mode voltage regulator (180) controlled by the digital device and receiving an external supply voltage (Vext) being higher than the internal core voltage through at least first and second external pins (140a, 140b) and generating the internal core voltage, wherein the internal switched mode voltage regulator is coupled with at least one external component (182) through at least one further external pin (140c) of the plurality of external pins.

Abstract translation: 集成电路装置具有以内部核心电压（Vint）工作的数字装置（600）; 线性稳压器（510）; 和由数字装置控制的内部开关模式电压调节器（180），并通过至少第一和第二外部引脚（140a，140b）接收高于内部核心电压的外部电源电压（Vext），并产生内部核心电压 ，其中所述内部开关模式电压调节器通过所述多个外部引脚的至少一个另外的外部引脚（140c）与至少一个外部部件（182）耦合。

公开(公告)号：WO2013142417A3

公开(公告)日：2013-12-05

申请号：PCT/US2013032799

申请日：2013-03-18

Applicant: MICROCHIP TECH INC

Inventor： STEWART GUY A

IPC: G06F21/32 ,  G06F21/83 ,  G06F21/85

CPC classification number: H04L63/0428 ,  G06F21/32 ,  G06F21/83 ,  G06F21/85 ,  H04L63/0861

Abstract: System and method for securing sensor data in a computer system that includes a host processor and memory that stores an operating system, and an embedded controller coupled to the host processor. The embedded processor receives sensor data for a user from at least one sensor, and encrypts and/or digitally signs the sensor data, thereby generating protected sensor data, or performs pattern recognition on the sensor data, thereby generating user identification data. The embedded processor then sends the protected sensor data or the user identification data to the operating system or another process coupled to the computer system. The protected sensor data or the user identification data are used for secure transmission of the sensor data.

Abstract translation: 用于保护计算机系统中的传感器数据的系统和方法，该计算机系统包括主处理器和存储操作系统的存储器，以及耦合到主处理器的嵌入式控制器。 嵌入式处理器从至少一个传感器接收用户的传感器数据，并对传感器数据进行加密和/或数字签名，从而生成受保护的传感器数据，或者对传感器数据执行模式识别，从而生成用户标识数据。 嵌入式处理器然后将受保护的传感器数据或用户标识数据发送到与计算机系统耦合的操作系统或另一个进程。 受保护的传感器数据或用户标识数据用于传感器数据的安全传输。

公开(公告)号：WO2013116435A3

公开(公告)日：2013-11-14

申请号：PCT/US2013024004

申请日：2013-01-31

Applicant: MICROCHIP TECH INC

Inventor： BOWLING STEPHEN ,  IVEY BRANT

IPC: G06F1/04

CPC classification number: H04J3/06 ,  G06F1/04

Abstract: A microcontroller has a timebase (110) driven by a clock signal, wherein the timebase has a reset input and an output coupled with a comparator (140). The comparator is further coupled with a register (150) and is operable to generate a synchronization output (sync out) signal if the timebase matches the register value. The microcontroller further has a first multiplexer (250) receiving the synchronization output signal from the comparator and further receiving at least one event signal generated by a unit other than the timebase, wherein the first multiplexer is operable to select either the synchronization output signal or the at least one event signal as a timebase synchronization output signal (260).

Abstract translation: 微控制器具有由时钟信号驱动的时基（110），其中时基具有复位输入和与比较器（140）耦合的输出。 比较器进一步与寄存器（150）耦合，并且如果时基匹配寄存器值，则可操作以产生同步输出（sync out）信号。 微控制器还具有从比较器接收同步输出信号的第一多路复用器（250），并进一步接收由除时基之外的单元产生的至少一个事件信号，其中第一多路复用器可操作以选择同步输出信号或 至少一个事件信号作为时基同步输出信号（260）。

公开(公告)号：WO2013009689A8

公开(公告)日：2013-09-06

申请号：PCT/US2012045932

申请日：2012-07-09

Applicant: MICROCHIP TECH INC ,  FRANCISCO RONALDO ,  WONG CHI LUNG ,  MESSANG TIM ,  ABERRA EZANA HAILE

Inventor： FRANCISCO RONALDO ,  WONG CHI LUNG ,  MESSANG TIM ,  ABERRA EZANA HAILE

IPC: G01R31/28

CPC classification number: G01R31/2875 ,  G01R31/2891

Abstract: A plurality of devices under test (DUT) are arranged in a strip tester having a temperature controlled heater block. Each DUT has a respective set of electrical test probes and a thermally conductive test probe for electrically and thermally coupling, respectively, of the strip tester to the DUTs. Temperature measurement of each of the plurality of DUTs is performed by a temperature measuring device. The temperature measuring device can be part of the test board of the strip tester and will be in thermal communications with the DUT through the thermally conductive test probe, or temperature of die DUT can be measurement with an RTD embedded in the thermally conductive test probe, thereby providing faster thermal response time.

Abstract translation: 将多个待测设备（DUT）布置在具有温控加热器块的条测试器中。 每个DUT分别具有一组电气测试探针和一个导热测试探针，用于分别将测试条电气和热耦合到DUT。 多个DUT中的每一个的温度测量由温度测量装置执行。 温度测量装置可以是条测试器的测试板的一部分，并且将通过导热测试探针与DUT热连通，或者DUT的温度可以使用嵌入在导热测试探针中的RTD进行测量， 从而提供更快的热响应时间。

公开(公告)号：WO2013123155A2

公开(公告)日：2013-08-22

申请号：PCT/US2013026090

申请日：2013-02-14

Applicant: MICROCHIP TECH INC

Inventor： PETER DIETER

IPC: H04B1/38

CPC classification number: H04B1/3838 ,  G01R27/2605 ,  H01Q1/50 ,  H03K17/955 ,  H04B17/103 ,  H04W52/18 ,  H04W52/367 ,  H04W64/00

Abstract: Detection of an increase in a mismatch of an antenna of a radio frequency (RF) device and/or a change in a capacitance value of the antenna indicates proximity of a body to the antenna. Upon detection of proximity of a body to the antenna, reduction of transmit power of the RF device may be done to meet Specific Absorption Rate (SAR) level regulations.

Abstract translation: 检测射频（RF）装置的天线不匹配的增加和/或天线的电容值的变化表示身体与天线的接近。 当检测到身体与天线的接近时，可以降低RF设备的发射功率以满足特定吸收率（SAR）水平的规定。

公开(公告)号：WO2013078108A3

公开(公告)日：2013-08-22

申请号：PCT/US2012065774

申请日：2012-11-19

Applicant: MICROCHIP TECH INC

Inventor： DARYANANI SONU ,  ZIEGENHORN FRANK

IPC: H03L7/00

CPC classification number: H03L1/026 ,  G01R31/2824

Abstract: Precision measurement of a period(s) of an embedded clock oscillator using a charge time measurement unit (CTMU) maintains a desired frequency accuracy of the embedded clock oscillator over a range of time, temperature and operating condition changes. The CTMU determines the free running frequency of the embedded clock oscillator and provides very accurate frequency (period) information for confirmation that a desired frequency, e.g., within 0.25 percent of the desired frequency, is running or an indication of how much and which direction to adjustment the frequency of the clock oscillator to maintain the frequency precision desired. Automatic frequency adjustment of the embedded clock oscillator may be implemented so as to maintain the desired precision frequency thereof. Temperature and voltage compensation profiles for maintaining the accuracy of the CTMU may be stored in a table, e.g., nonvolatile memory, for a further improvement in absolute frequency accuracy of the embedded clock oscillator.

Abstract translation: 使用充电时间测量单元（CTMU）对嵌入式时钟振荡器的周期进行精确测量，可以在一定的时间范围，温度和工作条件变化范围内保持嵌入式时钟振荡器的期望频率精度。 CTMU确定嵌入式时钟振荡器的自由运行频率，并提供非常准确的频率（周期）信息，用于确认期望的频率（例如在期望频率的0.25％内）正在运行，或者指示多少以及向哪个方向 调整时钟振荡器的频率以保持所需的频率精度。 嵌入式时钟振荡器的自动频率调整可以被实施以便保持其期望的精确频率。 用于保持CTMU精确度的温度和电压补偿曲线可以存储在例如非易失性存储器的表格中，以进一步改善嵌入式时钟振荡器的绝对频率精度。

公开(公告)号：WO2013078108A2

公开(公告)日：2013-05-30

申请号：PCT/US2012065774

申请日：2012-11-19

Applicant: MICROCHIP TECH INC

Inventor： DARYANANI SONU ,  ZIEGENHORN FRANK

IPC: H03L7/00

CPC classification number: H03L1/026 ,  G01R31/2824

Abstract: Precision measurement of a period(s) of an embedded clock oscillator using a charge time measurement unit (CTMU) maintains a desired frequency accuracy of the embedded clock oscillator over a range of time, temperature and operating condition changes. The CTMU determines the free running frequency of the embedded clock oscillator and provides very accurate frequency (period) information for confirmation that a desired frequency, e.g., within 0.25 percent of the desired frequency, is running or an indication of how much and which direction to adjustment the frequency of the clock oscillator to maintain the frequency precision desired. Automatic frequency adjustment of the embedded clock oscillator may be implemented so as to maintain the desired precision frequency thereof. Temperature and voltage compensation profiles for maintaining the accuracy of the CTMU may be stored in a table, e.g., nonvolatile memory, for a further improvement in absolute frequency accuracy of the embedded clock oscillator.

Abstract translation: 使用充电时间测量单元（CTMU）对嵌入式时钟振荡器的周期进行精确测量在一段时间，温度和工作条件变化的范围内保持嵌入式时钟振荡器所需的频率精度。 CTMU确定嵌入式时钟振荡器的自由运行频率，并提供非常精确的频率（周期）信息，以确认所需频率（例如，所需频率的0.25％）正在运行或指示多少和哪个方向 调整时钟振荡器的频率以保持所需的频率精度。 可以实现嵌入式时钟振荡器的自动频率调整，以保持其期望的精度频率。 用于保持CTMU的精度的温度和电压补偿简档可以存储在诸如非易失性存储器的表中，以进一步提高嵌入式时钟振荡器的绝对频率精度。

公开(公告)号：WO2013016273A3

公开(公告)日：2013-05-30

申请号：PCT/US2012047826

申请日：2012-07-23

Applicant: MICROCHIP TECH INC ,  DIX GREGORY ,  MCKEEN LEIGHTON E ,  LIVINGSTON IAN ,  MELCHER ROGER ,  BRAITHWAITE ROHAN

Inventor： DIX GREGORY ,  MCKEEN LEIGHTON E ,  LIVINGSTON IAN ,  MELCHER ROGER ,  BRAITHWAITE ROHAN

IPC: H01L29/78 ,  H01L21/266 ,  H01L21/336 ,  H01L23/544 ,  H01L29/08 ,  H01L29/10 ,  H01L29/36 ,  H01L29/423

CPC classification number: H01L29/7816 ,  H01L23/544 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7835 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

Abstract: At least one N-well implant having a different doping level is formed in a silicon substrate (202; 402) by first creating a "zero" layer (222) by etching the substrate with an alignment target (220) for aligning future process masks thereto. This alignment target is outside of any active device area. By using at least one N-well (204b; 404a) implant having a different doping level in combination with the substrate, a graded junction in the drift area (204b, 204a; 404a, 402) of a metal oxide semiconductor (MOS) field effect transistor (FET) can be created and a pseudo LDD structure may be realized thereby.

Abstract translation: 在硅衬底（202; 402）中形成具有不同掺杂水平的至少一个N阱注入，首先通过用对准未来处理掩模（220）对准靶（220）蚀刻衬底来产生“零”层（222） 于此。 此对齐目标位于任何活动设备区域之外。 通过与衬底组合使用至少一个具有不同掺杂级别的N阱（204b; 404a）注入，在金属氧化物半导体（MOS）场的漂移区（204b，204a; 404a，402）中的渐变结 可以产生效应晶体管（FET），从而可以实现伪LDD结构。

公开(公告)号：WO2012145511A3

公开(公告)日：2013-02-14

申请号：PCT/US2012034250

申请日：2012-04-19

Applicant: MICROCHIP TECH INC ,  KILZER KEVIN LEE ,  STEEDMAN SEAN ,  ZDENEK JERROLD S ,  DELPORT VIVIEN ,  LUNDSTRUM ZEKE ,  DUVENHAGE FANIE

Inventor： KILZER KEVIN LEE ,  STEEDMAN SEAN ,  ZDENEK JERROLD S ,  DELPORT VIVIEN ,  LUNDSTRUM ZEKE ,  DUVENHAGE FANIE

IPC: G06F15/78

CPC classification number: H03K19/17708 ,  G06F15/7867

Abstract: An integrated circuit device, in accordance with embodiments as claimed includes a central processing core; and a plurality of peripherals operably coupled to the RISC CPU core. In some embodiments, the plurality of peripherals include at least one configurable logic cell peripheral having more inputs than input-output connections on the integrated circuit device. In some embodiments, the inputs include one or more inputs from one or more integrated circuit subsystems.

Abstract translation: 根据权利要求的实施例的集成电路装置包括中央处理核心; 以及可操作地耦合到RISC CPU核心的多个外围设备。 在一些实施例中，多个外围设备包括具有比集成电路设备上的输入 - 输出连接更多的输入的至少一个可配置逻辑单元外围设备。 在一些实施例中，输入包括来自一个或多个集成电路子系统的一个或多个输入。