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公开(公告)号:KR1020080069430A
公开(公告)日:2008-07-28
申请号:KR1020070007133
申请日:2007-01-23
Applicant: 삼성전자주식회사
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/1658 , G11C13/0004 , G11C13/0069 , G11C2013/008 , G11C2213/35 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1675 , H01L45/1683
Abstract: A phase change memory device and a method for forming the same are provided to form an adhesive pattern which is made of a carbon containing material between a heater electrode and a phase change pattern for minimizing stress resulting from temperature change, thereby obtaining high bonding force of the electrode and the patterns. A phase change memory device comprises a heater electrode(206) on a substrate(200), a phase change pattern(310b), and an adhesive pattern(308b). The adhesive pattern is placed between the heater electrode and the phase change pattern and is made of a carbon containing material. An interlayer insulating layer(202) is placed on the substrate. The heater electrode is placed in an opening(204) passing through the interlayer insulating layer. A wiring(220'') is placed on the interlayer insulating layer.
Abstract translation: 提供相变存储器件及其形成方法,以形成由加热器电极和相变图案之间的含碳材料制成的粘合剂图案,用于使由温度变化引起的应力最小化,从而获得高粘合力 电极和图案。 相变存储器件包括在衬底(200)上的加热电极(206),相变图案(310b)和粘合剂图案(308b)。 粘合剂图案放置在加热器电极和相变图案之间,并由含碳材料制成。 在衬底上放置层间绝缘层(202)。 加热电极放置在通过层间绝缘层的开口(204)中。 布线(220“)被放置在层间绝缘层上。
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公开(公告)号:KR1020040035942A
公开(公告)日:2004-04-30
申请号:KR1020020062297
申请日:2002-10-12
Applicant: 삼성전자주식회사
IPC: H01L21/60
CPC classification number: H01L24/11 , H01L24/02 , H01L24/13 , H01L2224/0401 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/16 , H01L2924/0001 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/0106 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2224/29099 , H01L2924/00014 , H01L2924/00
Abstract: PURPOSE: A method for fabricating and mounting a flip chip is provided to reduce risks due to harmful gases in the fabrication process by performing an argon-hydrogen reflow process. CONSTITUTION: A plating seed layer is deposited on an upper surface of a substrate(102). An upper surface of the plating seed layer is patterned to form an UBM(Under Bump Metallurgy) layer(110) by using photoresist. The UBM layer(110) is deposited on an upper surface of a photoresist pattern. The photoresist and the plating seed layer are removed therefrom. A solder bump is formed on the UBM layer(110). A reflow process for the solder bump is performed by using an argon-hydrogen process.
Abstract translation: 目的:提供一种用于制造和安装倒装芯片的方法,以通过进行氩 - 氢回流工艺来减少由于制造过程中的有害气体引起的风险。 构成:电镀种子层沉积在基底(102)的上表面上。 通过使用光致抗蚀剂,将电镀种子层的上表面图案化以形成UBM(Under Bump Metallurgy)(110)。 UBM层(110)沉积在光刻胶图案的上表面上。 从中除去光致抗蚀剂和电镀种子层。 在UBM层(110)上形成焊料凸块。 通过使用氩 - 氢处理来进行焊料凸块的回流工艺。
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公开(公告)号:KR101519363B1
公开(公告)日:2015-05-13
申请号:KR1020090012513
申请日:2009-02-16
Applicant: 삼성전자주식회사
IPC: G11C16/04 , H01L27/115
Abstract: 저항체를 이용한 멀티 레벨 비휘발성 메모리 장치가 제공된다. 상기 멀티 레벨 비휘발성 메모리 장치는 워드 라인, 비트 라인, 및 워드 라인 및 비트 라인에 커플링되는 멀티 레벨 메모리 셀로서, 멀티 레벨 메모리 셀은 동일한 극성의 제1 및 제2 라이트 바이어스가 인가됨에 따라 제1 저항 레벨 및 제1 저항 레벨보다 높은 제2 저항 레벨을 가지며, 서로 다른 극성의 제3 및 제4 라이트 바이어스가 인가됨에 따라 제1 및 제2 저항 레벨 사이의 제3 및 제4 저항 레벨을 가지는 멀티 레벨 메모리 셀을 포함한다.
비휘발성 메모리 장치, 멀티 레벨-
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公开(公告)号:KR1020120100397A
公开(公告)日:2012-09-12
申请号:KR1020110019261
申请日:2011-03-04
Applicant: 삼성전자주식회사
IPC: H01L21/3205 , H01L21/02 , H01L21/28 , H01L27/108 , H01L29/51 , H01L49/02
CPC classification number: H01L28/60 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/02271 , H01L21/0228 , H01L21/28194 , H01L27/10808 , H01L27/10814 , H01L27/10855 , H01L28/40 , H01L29/517 , H01L29/78 , H01L21/32056 , H01L21/02109 , H01L21/02205
Abstract: PURPOSE: A method for forming a dielectric film and a method for manufacturing a semiconductor device using the same are provided to offer the dielectric film in which electrical characteristic and structural stability are improved by mutually compensating disadvantages of active oxidizer and deactivation oxidizer. CONSTITUTION: A substrate is loaded within a processing chamber(S10). A metal precursor is absorbed on the substrate by supplying source gas including the metal precursor within the processing chamber(S20). A preparatory dielectric layer is formed by supplying deactivation oxidizer reacting to the metal precursor absorbed within the processing chamber(S30). A dielectric layer is formed by supplying active oxidizer to the preparatory dielectric layer(S40). The reactivity of the active oxidizer is higher than the deactivation oxidizer. [Reference numerals] (AA) Start; (BB) End; (S10) A substrate is loaded within a processing chamber; (S20) A metal precursor is absorbed on the substrate by supplying source gas including the metal precursor within the processing chamber; (S30) A preparatory dielectric layer is formed by supplying deactivation oxidizer reacting to the metal precursor absorbed within the processing chamber; (S40) A dielectric layer is formed by supplying active oxidizer to the preparatory dielectric layer
Abstract translation: 目的:提供一种形成电介质膜的方法和使用该方法的半导体器件的制造方法,以提供通过相互补偿有源氧化剂和失活氧化剂的缺点来提高电特性和结构稳定性的电介质膜。 构成:将衬底装载到处理室内(S10)。 通过在处理室内供给包括金属前体的源气体,在基板上吸收金属前体(S20)。 通过向停止处理室内吸收的金属前驱体提供失活氧化剂来形成预备电介质层(S30)。 通过向预备电介质层提供活性氧化剂形成电介质层(S40)。 活性氧化剂的反应性高于去活化氧化剂。 (附图标记)(AA)开始; (BB)结束; (S10)将基板装载在处理室内; (S20)通过在处理室内供给包含金属前体的源气体,将金属前体吸收在基板上; (S30)通过向被处理室内吸收的金属前体反应而提供失活氧化剂,形成预备电介质层; (S40)通过向预备电介质层供给活性氧化剂形成电介质层
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公开(公告)号:KR1020120032395A
公开(公告)日:2012-04-05
申请号:KR1020110043754
申请日:2011-05-11
Applicant: 삼성전자주식회사
IPC: H01L51/52
CPC classification number: H01L51/5246 , H01L27/3276 , H01L51/5203
Abstract: PURPOSE: A display panel and a manufacturing method thereof are provided to arrange a rounding part on the edge part of the display panel, thereby suppressing stress concentration in the edge part of the display panel due to mechanical stress. CONSTITUTION: A lower chip panel(110) is comprised of a lower surface(111), an upper surface(113), and a side surface(115). A rounding part(117) of a curved surface shape is formed on a connection part of the side surface and the lower surface. A bonding layer(120) is arranged on the upper surface of the lower chip panel. An internal region(121) of a vacuum state is formed inside of the bonding layer. An upper chip panel(130) is laminated on the upper part of the lower chip panel.
Abstract translation: 目的:提供一种显示面板及其制造方法,用于在显示面板的边缘部分上布置圆形部分,从而抑制由于机械应力引起的显示面板的边缘部分的应力集中。 构成:下片(110)由下表面(111),上表面(113)和侧表面(115)组成。 在侧面和下表面的连接部分上形成有弯曲表面形状的圆形部分(117)。 在下芯片面板的上表面配置有接合层(120)。 在接合层的内部形成真空状态的内部区域(121)。 上芯片面板(130)层叠在下芯片面板的上部。
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