公开(公告)号：US20170015548A1

公开(公告)日：2017-01-19

申请号：US14963362

申请日：2015-12-09

Applicant: Texas Instruments Incorporated

Inventor： Jie Mao ,  Hau Nguyen ,  Luu Nguyen ,  Anindya Poddar

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00873 ,  B81B7/007 ,  B81B2201/0214 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0278 ,  B81B2201/0292 ,  B81B2201/047 ,  B81B2207/07 ,  B81B2207/098 ,  B81C1/00333 ,  B81C2201/0125 ,  B81C2201/0132 ,  B81C2201/0159 ,  B81C2201/0181 ,  B81C2201/0188 ,  B81C2203/0136 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/3121 ,  H01L24/19 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/96 ,  H01L2924/3511

Abstract: A method for fabricating packaged semiconductor devices (100) with an open cavity (110a) in panel format; placing (process 201) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad (230) and symmetrically placed vertical pillars (231); attaching (process 202) semiconductor chips (101) with sensor systems face-down onto the tape; laminating (process 203) and thinning (process 204) low CTE insulating material (234) to fill gaps between chips and grid; turning over (process 205) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process 206) uniform metal layer across assembly and optionally plating (process 209) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process 212) insulating stiffener across panel; opening (process 213) cavities in stiffener to access the sensor system; and singulating (process 214) packaged devices by cutting metallic pieces.

Abstract translation: 一种以面板格式制造具有开口腔（110a）的封装半导体器件（100）的方法; 将具有平垫（230）和对称放置的垂直柱（231）的金属片的面板尺寸网格放置（处理201）在粘合剂载带上。 将具有传感器系统的半导体芯片（工艺202）面朝下地附接到带上; 层压（工艺203）和减薄（工艺204）低CTE绝缘材料（234）以填充芯片和网格之间的间隙; 翻转（过程205）组装以去除胶带; 等离子体清洁组件正面，溅射和图案化（工艺206）跨组合均匀的金属层和任选的电镀（工艺209）金属层以形成重新布线迹线和扩展的接触垫用于组装; 层压（工艺212）跨板的绝缘加强件; 在加强件中打开（过程213）空腔以接近传感器系统; 并通过切割金属片来分割（处理214）包装的装置。

公开(公告)号：US20150147845A1

公开(公告)日：2015-05-28

申请号：US14552548

申请日：2014-11-25

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Mark Allen Gerber ,  Mutsumi Masumoto ,  Masamitsu Matsuura ,  Kengo Aoya ,  Takeshi Onogami

IPC: H01L25/00 ,  H01L21/304 ,  H01L21/683 ,  H01L21/3213 ,  H01L21/321 ,  H01L21/3105 ,  H01L21/768

CPC classification number: H01L21/561 ,  H01L21/4857 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2924/12042 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00

Abstract: Embodiments of the invention provide a method for forming a dual sided embedded die system. The method begins with starting material including a top surface and a bottom surface, a plurality of vias, a plurality of plated metal posts, die pads, and stiffeners. The surface are planarized to expose the included metal which is than selectively etching from die attach pad DAP areas to form cavities. Create a stiffener by using photo resist patterning and plating. Apply tacky tape. Attach a die. Laminate and grind. Remove tacky tape. Form redistribution layers RDLs and a solder mask. Mounting Surface Mount Devices.

Abstract translation: 本发明的实施例提供了一种用于形成双面嵌入式模具系统的方法。 该方法从起始材料开始，包括顶表面和底表面，多个通孔，多个电镀金属柱，冲压垫和加强件。 将表面平坦化以暴露所包含的金属，其不是从管芯附着垫DAP区域选择性地蚀刻以形成空腔。 通过使用光刻胶图案和电镀创建一个加强筋。 涂抹胶带。 附上一个模具 层压和研磨。 去除胶带。 形式重新分配层RDL和焊接掩模。 安装表面贴装器件。

公开(公告)号：US12160219B2

公开(公告)日：2024-12-03

申请号：US18454034

申请日：2023-08-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya Poddar ,  Hau Nguyen ,  Masamitsu Matsuura

IPC: H03H9/02 ,  H03H3/007 ,  H03H3/04 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03H9/24

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

公开(公告)号：US11923281B2

公开(公告)日：2024-03-05

申请号：US17719246

申请日：2022-04-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya Poddar ,  Woochan Kim ,  Vivek Kishorechand Arora

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L25/16

CPC classification number: H01L23/49811 ,  H01L21/4853 ,  H01L21/4882 ,  H01L23/3121 ,  H01L23/367 ,  H01L24/05 ,  H01L24/43 ,  H01L24/45 ,  H01L25/16 ,  H01L2924/1304

Abstract: A semiconductor package includes a metallic pad and leads, a semiconductor die attached to the metallic pad, the semiconductor die including an active side with bond pads opposite the metallic pad, a wire bond extending from a respective bond pad of the semiconductor die to a respective lead of the leads, a heat spreader over the active side of the semiconductor die with a gap separating the active side of the semiconductor die from the heat spreader, an electrically insulating material within the gap and in contact with the active side of the semiconductor die and the heat spreader; and mold compound covering the semiconductor die and the wire bond, and partially covering the metallic pad and the heat spreader, with the metallic pad exposed on a first outer surface of the semiconductor package and with the heat spreader exposed on a second outer surface of the semiconductor package.

公开(公告)号：US20240038691A1

公开(公告)日：2024-02-01

申请号：US17877426

申请日：2022-07-29

Applicant: Texas Instruments Incorporated

Inventor： Vijaylaxmi Gumaste Khanolkar ,  Anindya Poddar ,  Hassan Omar Ali ,  Dibyajat Mishra ,  Venkatesh Srinivasan ,  Swaminathan Sankaran

IPC: H01L23/66 ,  H01Q1/22 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/66 ,  H01Q1/2283 ,  H01L21/565 ,  H01L21/561 ,  H01L24/96 ,  H01L24/97 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2223/6688 ,  H01L2924/2027 ,  H01L2924/182

Abstract: In a described example, an apparatus includes: a semiconductor device mounted to a device side surface of a package substrate, the package substrate having a board side surface opposite the device side surface; an antenna module mounted to the package substrate and coupled to the semiconductor device; and mold compound covering the semiconductor device and a portion of the package substrate.

公开(公告)号：US11736085B2

公开(公告)日：2023-08-22

申请号：US17002357

申请日：2020-08-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya Poddar ,  Hau Nguyen ,  Masamitsu Matsuura

IPC: H03H9/02 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03H9/24 ,  H03H3/007 ,  H03H3/04

CPC classification number: H03H9/02133 ,  H03H3/0073 ,  H03H3/04 ,  H03H9/02102 ,  H03H9/02448 ,  H03H9/0523 ,  H03H9/0533 ,  H03H9/0547 ,  H03H9/1021 ,  H03H9/1057 ,  H03H9/17 ,  H03H9/2426 ,  H03H9/2457 ,  H03H2003/0407

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

公开(公告)号：US20230136784A1

公开(公告)日：2023-05-04

申请号：US17515176

申请日：2021-10-29

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Ashok Surendra Prabhu ,  Edgar Dorotyao Balidoy ,  Hau Nguyen ,  Makoto Yoshino ,  MING LI

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H05K1/02

Abstract: A described example includes: a package substrate having a die pad with a die side surface and having an opposite backside surface, having leads arranged along two opposite sides and having die pad straps extending from two opposing ends of the die pad. The leads lie in a first plane, a portion of the die pad straps lie in a second plane that is spaced from the first plane and located closer to the die pad, and the die pad lies in a third plane that is spaced from and parallel to the second plane in a direction away from the first plane. A semiconductor die is mounted to the die side surface and mold compound covers the semiconductor die, a portion of the leads, and the die side surface of the die pad, and the backside surface of the die pad exposed from the mold compound.

公开(公告)号：US20230059142A1

公开(公告)日：2023-02-23

申请号：US17404765

申请日：2021-08-17

Applicant: Texas Instruments Incorporated

Inventor： Vivek Arora ,  Woochan Kim ,  Anindya Poddar

IPC: H01L23/433 ,  H01L23/31 ,  H01L23/00 ,  H01L23/495

Abstract: In a described example, an apparatus includes: a package substrate having a die mount surface; semiconductor die flip chip mounted to the package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the active surface of the semiconductor die and connected to the package substrate by solder joints; a thermal interposer comprising a thermally conductive material positioned over and in thermal contact with a backside surface of the semiconductor die; and mold compound covering a portion of the package substrate, a portion of the thermal interposer, the semiconductor die, and the post connects, the thermal interposer having a surface exposed from the mold compound.

公开(公告)号：US11430722B2

公开(公告)日：2022-08-30

申请号：US15951003

申请日：2018-04-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeffrey Morroni ,  Rajeev Dinkar Joshi ,  Sreenivasan K. Koduri ,  Sujan Kundapur Manohar ,  Yogesh K. Ramadass ,  Anindya Poddar

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/498 ,  H01L21/48 ,  H01L23/50

Abstract: A semiconductor package includes a leadframe, a semiconductor die attached to the leadframe, and a passive component electrically connected to the semiconductor die through the leadframe. The leadframe includes a cavity in a side of the leadframe opposite the semiconductor die, and at least a portion of the passive component resides within the cavity in a stacked arrangement.

公开(公告)号：US11410875B2

公开(公告)日：2022-08-09

申请号：US16225875

申请日：2018-12-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hau Thanh Nguyen ,  Woochan Kim ,  Yi Yan ,  Luu Thanh Nguyen ,  Ashok Prabhu ,  Anindya Poddar ,  Masamitsu Matsuura ,  Kengo Aoya ,  Mutsumi Masumoto

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/31 ,  H01L23/00

Abstract: An electronic device (100) includes a substrate (110) and an integrated circuit (120) provided on the substrate (110) having a surface facing away from the substrate (110). An insulating layer (150) extends over the substrate (110) and around the integrated circuit (120) to define an interface (154) between the insulating layer (150) and the integrated circuit (120). An electrically conductive via (130) is provided on the surface of the integrated circuit (120). An insulating material (140) extends over the via (130) and includes an opening (142) exposing a portion of the via (130). A repassivation member (162) extends over the insulating layer (150) and has a surface (164) aligned with the interface (154). An electrically conductive redistribution member (181) is electrically connected to the via (130) and extends over the repassivation member (162) into contact with the insulating layer (150).