Abstract:
A light emitting diode (LED) has an integrated heat sink structure for removing heat from an LED junction and for dissipating heat from the junction to the ambient air. The anode and the cathode both either act as or are coupled to a thermally conductive material which acts as the heat sink. In one embodiment, the heat sink forms a mounting configuration that allows air to circulate around multiple surfaces to maximize heat dissipation. As a result, the LED junction temperature remains low, allowing the LED to be driven with higher currents and generate a higher light output without adverse temperature-related effects.
Abstract:
A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and an inner row of one or more printed through holes (PTH). The hybrid footprint design enables a data through put of at least 10 Gbps.
Abstract:
An inductor includes a core (1514) formed of a magnetic material and a foil winding (1506) wound at least partially around or through at least a portion of the core. A first end of the winding extends away from the core to form an extended output tongue (1604) configured and arranged to supplement or serve as a substitute for a printed circuit board foil trace. A second end of the winding forms a solder tab (1504). At least a portion of the extended output tongue and the solder tab are formed at a same height relative to a bottom surface of the core. Another inductor includes a core formed of a magnetic material, a winding wound at least partially around or through at least a portion of the core, and a ground return conductor (1508, 1510) attached to the core. The core does not form a magnetic path loop around the ground return conductor.
Abstract:
An improved multi-chip module includes a main circuit board having and array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of the package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. A number of other vriations exist that provide various other embodiments of the invention including one in which the carrier leads are laminated directly to the leads of an IC package.
Abstract:
A package carrier (100) for increasing the circuit density on printed circuit boards (503). The package carrier (100) mounts on a printed circuit board (503) on top of a first integrated circuit package (507) that is also mounted on the printed circuit board (503). The carrier (100) has an upper major surface (102U) having a pad array on which a second integrated circuit package (501) is mountable. The carrier (100) has a plurality of leads by means of which the carrier (100) is surface mounted to the printed circuit board (503). Each carrier lead is also electrically connected to a single pad of the pad array on the upper surface (102U). The integrated circuit package (507) beneath the carrier (100) shares all or most printed circuit board (503) connections in common with the carrier (100) and consequently the integrated ciurcut package (501) mounted upon the carrier (100). The carrier (100) also includes heat sink or heat disipation structures.
Abstract:
A semiconductor device with a high package lead density such as the PGA type, allowing the density of the semiconductor device to increase by forming the leads of the semiconductor device with lead pins (14) for surface mounting arranged by the specified quantity at the outer peripheral area on the back of a package (13) where a chip (11) is mounted and lead members (22 and 41) having the predetermined function at least one of which is arranged at the internal area other than the area of the above lead pins (14).
Abstract:
PURPOSE: An integrated passive device assembly is provided to obtain plural passive devices in the same area by installing a conductive pattern for installing the passive device on both sides of a device. CONSTITUTION: An integrated passive device assembly comprises the following: a substrate(10) including a wire pattern(12); an integrated passive device(20) including conductive patterns on the upper and lower side, mounted on the upper side of the substrate; a first connection unit electrically connecting the conductive pattern on the upper side of the integrated passive device with the wire pattern; and a second connection unit electrically connecting the conductive pattern on the lower side of the integrated passive device with the wire pattern.
Abstract:
본 발명은 다수의 전기부품들을 연결하도록 제1도선(102)와 제2도선(108)을 각기 구비한 제1인쇄회로기판(100)과 제2인쇄회로기판(200)으로 이루어진 인쇄회로기판조립체(PCB)에 관한 것이다. 제1인쇄회로기판은 제2인쇄회로기판 상에서 평행하게 배치된다. 제1인쇄회로기판은 적어도 하나의 제1도선 및 제2도선을 매개로 제2인쇄회로기판과 전기연결된다. 제1인쇄회로기판의 면적이 제2인쇄회로기판의 면적보다 작다. 제2인쇄회로기판이 전기부품의 배치를 위한 주회로기판으로 사용된다. 바람직하기로, 복합하거나 고전압 회로는 제1인쇄회로기판에 배치되고 다른 회로들은 제2인쇄회로기판에 배치된다.