METHOD FOR PRODUCING CAVITIES HAVING AN OPTICALLY TRANSPARENT WALL
    71.
    发明申请
    METHOD FOR PRODUCING CAVITIES HAVING AN OPTICALLY TRANSPARENT WALL 审中-公开
    用于生产孔洞用光学透明壁

    公开(公告)号:WO03031318A3

    公开(公告)日:2003-09-25

    申请号:PCT/DE0203261

    申请日:2002-09-04

    Abstract: Disclosed is a method enabling cavities (7) having an optically transparent wall to be produced in a component (10) using standard microsystem engineering methods in a simple and economical manner. Firstly, a silicon area which is surrounded on all sides by an optically transparent outer layer is produced. At least one opening (6) is subsequently produced in the outer layer. Said opening (6) is used to dissolve out the silicon surrounded by the outer layer in order to create a cavity (7) inside the outer layer. The outer layer acts as a layer which stops etching.

    Abstract translation: 它提出了一种方法,可以通过使用微技术简单且廉价的Hohlräurne的标准方法(7)在一个部件(10)的光学透明的壁来产生。 为了这个目的,一个硅区被首先产生,其通过光学透明的包层在所有侧面包围。 然后,在包覆层的至少一个开口(6)产生的。 关于合成开口(6)溶于由硅的包层包围,使得腔体(7)设置在包层内形成。 该包覆层用作蚀刻停止层。

    METHOD FOR IMPROVED DIE RELEASE OF A SEMICONDUCTOR DEVICE FROM A WAFER
    72.
    发明申请
    METHOD FOR IMPROVED DIE RELEASE OF A SEMICONDUCTOR DEVICE FROM A WAFER 审中-公开
    从WAFER改进半导体器件释放的方法

    公开(公告)号:WO2003001565A2

    公开(公告)日:2003-01-03

    申请号:PCT/US2002/010616

    申请日:2002-04-03

    IPC: H01L

    CPC classification number: B81C1/00873 B81C2201/014

    Abstract: A microelectromechanical (MEMS) device and a method of fabricating a MEMS device are provided. The method of fabricating the MEMS device includes the steps of: etching a die release trench in a primary handle layer of a wafer having the handle layer, an etch-stop layer disposed on the primary handle layer, and a device layer disposed on the etch-stop layer; patterning a release trench in the device layer disposed on the etch-stop layer; patterning a release trench in the device layer that is aligned with the release trench in the primary handle layer; temporarily attaching an additional handle layer to the primary handle layer; etching the device layer to define a structure in the device layer; removing the etch-stop layer; and removing the additional handle layer to release the die.

    Abstract translation: 提供了一种微机电(MEMS)器件和MEMS器件的制造方法。 制造MEMS器件的方法包括以下步骤:蚀刻具有手柄层的晶片的主手柄层中的裸片释放沟槽,设置在主手柄层上的蚀刻停止层以及设置在蚀刻上的器件层 停留层 图案化设置在蚀刻停止层上的器件层中的释放沟槽; 图案化在与主手柄层中的释放沟槽对准的器件层中的释放沟槽; 临时附加手柄层到主手柄层; 蚀刻器件层以限定器件层中的结构; 去除蚀刻停止层; 并移除附加手柄层以释放模具。

    BONDED WAFER OPTICAL MEMS PROCESS
    73.
    发明申请
    BONDED WAFER OPTICAL MEMS PROCESS 审中-公开
    粘结波长光学MEMS工艺

    公开(公告)号:WO0212116A3

    公开(公告)日:2002-04-04

    申请号:PCT/US0141523

    申请日:2001-08-03

    Abstract: A microelectromechanical system is fabricated from a substrate having a handle layer, a silicon sacrificial layer and a device layer. A micromechanical structure is etched in the device layer and the underlying silicon sacrificial layer is etched away to release the micromechanical structure for movement. One particular micromechanical structure described is a micromirror.

    Abstract translation: 由具有手柄层,硅牺牲层和器件层的衬底制造微机电系统。 在器件层中蚀刻微机械结构,并蚀刻掉下面的硅牺牲层以释放用于移动的微机械结构。 所描述的一个特定的微机械结构是微镜。

    積層体中に微小電気機械構造を製造する方法及び微小電気機械構造を備える相応の電子素子
    76.
    发明专利
    積層体中に微小電気機械構造を製造する方法及び微小電気機械構造を備える相応の電子素子 审中-公开
    用的方法和微机电结构对应在堆叠产生微机电结构的电子设备

    公开(公告)号:JP2016203366A

    公开(公告)日:2016-12-08

    申请号:JP2016082397

    申请日:2016-04-15

    CPC classification number: B81C1/00182 B81B2203/0118 B81C2201/014

    Abstract: 【課題】積層体中に微小電気機械構造(ME1)を製造する方法及び微小電気機械構造を備える相応の電子素子を提供する。 【解決手段】第1の表面(10)を有するキャリア基板(T1)を用意するステップと、第1の表面に絶縁層(I1)を被着するステップと、絶縁層に第1のシリコン層(S1)をエピタキシャル成長させるステップと、第1のシリコン層(S1)にトレンチ(G)を形成するステップと、第1のシリコン層をパッシベートするステップであってトレンチは充填され第1の表面とは反対側にパッシベーション層(P)が生じるステップと、パッシベーション層をパターニングするステップであって第1のシリコン層に犠牲領域(O1)と機能領域(F1)とが形成され犠牲領域はキャリア基板とは反対側で少なくとも部分的にパッシベーション層(P)から露出するステップと、最終的に犠牲領域を除去するステップとを備える。 【選択図】図10

    Abstract translation: 用的方法和微机电结构在层压体的制造一个微机电结构(ME1)对应的电子设备。 该方法包括:提供具有第一表面(10)的载体基板(T1),绝缘层(I1)的步骤沉积在第一表面上,所述第一硅层,以在绝缘层( (外延生长步骤S1中),相反的步骤和方法,包括钝化所述第一硅层的步骤的填充沟槽第一表面上形成在所述第一硅层中的沟槽(G)S1) 钝化层的上侧(P)的工序时,与功能区域(F1),并在第一硅层上形成牺牲区域的牺牲区域(01)图案化钝化层的相对的载体基板的工序 至少部分上包括将所述钝化层(P),以及去除所述牺牲最终区域的步骤的一侧。 .The 10

    Method of producing structure comprising at least one active part having zone of different thickness
    77.
    发明专利
    Method of producing structure comprising at least one active part having zone of different thickness 有权
    生产包含至少一个具有不同厚度区域的活动部件的结构的方法

    公开(公告)号:JP2013111745A

    公开(公告)日:2013-06-10

    申请号:JP2012260855

    申请日:2012-11-29

    Abstract: PROBLEM TO BE SOLVED: To provide a method of producing a structure which includes an active part comprising at least two zones of different thicknesses and in which at least one of these zones is composed of a single-crystal semiconductor material and reducing cost and having no drawback.SOLUTION: There is provided the method of producing the structure comprising the active part including first and second suspended zone of thicknesses different from that of a first substrate. The method includes steps of (a) demarcating the contour in the horizontal direction of at least one first suspended zone with first thickness thinner than that of the first substrate by processing the front face of the first substrate, (b) forming an etch stop layer of the first suspended zone of a lower part of a suspended zone, this is carried out before a step of removing a semiconductor material arranged at the lower part of the first suspended zone, (c) forming a sacrifice layer on the front face of the first substrate, (d) releasing the sacrifice layer by processing from the back face of the first substrate, forming at least one second suspended zone, and making it reach the stop layer of the first suspended zone, and (e) releasing the first and second suspended zones.

    Abstract translation: 解决的问题:提供一种制造结构的方法,该结构包括包含至少两个不同厚度的区域的活性部分,并且其中至少一个这些区域由单晶半导体材料构成并且降低成本 并没有缺点。 提供了包括活性部分的结构的方法,所述活性部分包括不同于第一基底的厚度的第一和第二悬浮区域。 该方法包括以下步骤:(a)通过处理第一衬底的前表面,将至少一个第一悬挂区域的水平方向上的轮廓划分为具有比第一衬底薄的第一厚度的第一厚度,(b)形成蚀刻停止层 在除去布置在第一悬浮区域的下部的半导体材料的步骤之前进行,(c)在第一悬浮区的下表面上形成牺牲层, 第一衬底,(d)通过加工从第一衬底的背面释放牺牲层,形成至少一个第二悬浮区,并使其到达第一悬浮区的停止层,和(e)释放第一和 第二个暂停区。 版权所有(C)2013,JPO&INPIT

    Capacitor microphone and pressure sensor
    80.
    发明专利
    Capacitor microphone and pressure sensor 有权
    电容麦克风和压力传感器

    公开(公告)号:JP2003031820A

    公开(公告)日:2003-01-31

    申请号:JP2001219465

    申请日:2001-07-19

    Abstract: PROBLEM TO BE SOLVED: To provide a capacitor microphone and pressure sensor, which can incease the degree of freedom in the structure of a parallel plate electrode, designing of a mountable circuit by eliminating the restriction in a producing process.
    SOLUTION: The capacitor microphone and pressure sensor 100 is formed by etching a bonded substrate 400 having an etch stop layer 220 on one surface of a vibration film substrate 210, and obtained by inserting a bonding film 320 to be used for bonding the vibration film substrate 210 and a rear surface plate substrate 310 between the etch stop layer 220 and the rear surface plate substrate 310 to bond them. The bonding film 320 contains the same impurity as the boron doped for forming the etch stop layer 220, the density of the impurity contained in the bonding film 320 equal to or higher than that of the impurity doped in the etch stop layer 220, impurity diffusion for forming the etch stop layer 220 is performed at ≤1200°C, and heat processing after this is performed at ≥900°C and equal to or lower than the temperature of the impurity diffusion.
    COPYRIGHT: (C)2003,JPO

    Abstract translation: 要解决的问题:提供一种电容式麦克风和压力传感器,其可以增加平行板电极的结构的自由度,通过消除制造过程中的限制来设计可安装的电路。 解决方案:电容式麦克风和压力传感器100通过在振动膜基板210的一个表面上蚀刻具有蚀刻停止层220的键合衬底400而形成,并且通过插入用于接合振动膜基板的接合膜320 210和位于蚀刻停止层220和背面板基板310之间的后表面板基板310以将它们接合。 接合膜320包含与用于形成蚀刻停止层220的掺杂的硼相同的杂质,接合膜320中包含的杂质的密度等于或高于在蚀刻停止层220中掺杂的杂质的密度,杂质扩散 用于形成蚀刻停止层220在<= 1200摄氏度下进行,此后在> = 900℃下进行热处理并且等​​于或低于杂质扩散温度。

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