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公开(公告)号：KR1020080073549A
公开(公告)日：2008-08-11
申请号：KR1020070012281
申请日：2007-02-06
Applicant: 삼성전자주식회사
IPC: G02F1/136
CPC classification number: H01L27/1288 , G02F1/1303 , G03F7/70291 , G03F7/70466 , H01L21/0275 , H01L21/32139 , H01L27/1214
Abstract: A method for forming a photoresist pattern and a method for manufacturing a display panel are provided to manufacture the display panel without a mask, thereby lowering the manufacturing cost. A gate pattern having a gate line and a gate electrode(21) is formed on a substrate(10) by using a first conductive layer. A gate insulating layer(30), an amorphous silicon layer(240), an impurity-doped amorphous silicon layer(245), a second conductive layer(250), and a photoresist are sequentially formed over the substrate. The photoresist includes a channel region, through which a channel of a thin film transistor is to be formed, and a data pattern region, through which a data pattern having electrodes of the thin film transistor and a data line is to be formed. The photoresist is subjected to light exposure to form a stepped photoresist pattern(221), wherein the light exposure is performed in the channel region and the data pattern region a different number of times respectively. An etching process is performed on the resultant substrate including the stepped photoresist pattern to form the thin film transistor and the data line. A passivation film is formed on the resultant substrate, having a pixel contact hole which exposes a portion of a drain electrode. A pixel electrode is formed on the passivation film and electrically connected to the drain electrode through the pixel contact hole.
Abstract translation: 提供一种形成光致抗蚀剂图案的方法和用于制造显示面板的方法以制造不带有掩模的显示面板，从而降低制造成本。 通过使用第一导电层，在基板（10）上形成具有栅极线和栅电极（21）的栅极图案。 在衬底上依次形成栅绝缘层（30），非晶硅层（240），杂质掺杂非晶硅层（245），第二导电层（250）和光致抗蚀剂。 光致抗蚀剂包括要形成薄膜晶体管的通道的通道区域和要形成具有薄膜晶体管和数据线的电极的数据图案的数据图案区域。 对光致抗蚀剂进行曝光以形成阶梯式光致抗蚀剂图案（221），其中在沟道区域和数据图案区域中分别进行不同次数的曝光。 对包括阶梯式光致抗蚀剂图案的所得基板进行蚀刻处理，以形成薄膜晶体管和数据线。 在所得到的衬底上形成钝化膜，具有露出一部分漏电极的像素接触孔。 像素电极形成在钝化膜上，并通过像素接触孔与漏电极电连接。
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公开(公告)号：KR1020060090352A
公开(公告)日：2006-08-10
申请号：KR1020050011136
申请日：2005-02-07
Applicant: 삼성전자주식회사
IPC: G02F1/136
CPC classification number: H01L29/458 , H01L27/124 , H01L27/3276 , H01L29/4908 , H01L51/0021
Abstract: 본발명은 박막트랜지스터 기판과 그 제조방법에 관한 것이다. 본발명에 따른 박막트랜지스터 기판은 알루미늄층과, 상기 알루미늄층 상에 위치하며 상기 알루미늄층 두께의 10 내지 40%의 두께를 가지는 상부 몰리브덴층을 포함하는 것을 특징으로 한다. 이에 의하여 알루미늄 배선에서 발생하는 힐록을 감소시킬 수 있다.
Abstract translation: 本发明涉及薄膜晶体管基板及其制造方法。 根据本发明的薄膜晶体管基板包括铝层和位于该铝层上并具有该铝层厚度的10至40％的厚度的上部钼层。 因此，可以减少在铝布线中产生的小丘。
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公开(公告)号：KR101137735B1
公开(公告)日：2012-04-24
申请号：KR1020050047861
申请日：2005-06-03
Applicant: 삼성전자주식회사
IPC: G02F1/136 , H01L21/31 , H01L29/786
Abstract: A mask is provided. The mask includes a mask body, a first exposing part and a second exposing part. The first exposing part is on the mask body. The first exposing part includes a first light transmitting portion and second light transmitting portions. The first light transmitting portion exposes a portion of the photoresist film corresponding to the output terminal to a light of a first light amount. The second light transmitting portions exposes an adjacent portion of the photoresist film adjacent to the output terminal to a light of a second light amount smaller than the first light amount. The second exposing part is on the mask body. The second exposing part includes third light transmitting portions for partially exposing the photoresist film corresponding to the storage electrode to a light of a third light amount that is between the first and second light amounts.
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公开(公告)号：KR101085450B1
公开(公告)日：2011-11-21
申请号：KR1020050011136
申请日：2005-02-07
Applicant: 삼성전자주식회사
IPC: G02F1/136
CPC classification number: H01L29/458 , H01L27/124 , H01L27/3276 , H01L29/4908 , H01L51/0021
Abstract: 본발명은 박막트랜지스터 기판과 그 제조방법에 관한 것이다. 본발명에 따른 박막트랜지스터 기판은 알루미늄층과, 상기 알루미늄층 상에 위치하며 상기 알루미늄층 두께의 10 내지 40%의 두께를 가지는 상부 몰리브덴층을 포함하는 것을 특징으로 한다. 이에 의하여 알루미늄 배선에서 발생하는 힐록을 감소시킬 수 있다.
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公开(公告)号：KR1020080008734A
公开(公告)日：2008-01-24
申请号：KR1020060068334
申请日：2006-07-21
Applicant: 삼성전자주식회사
IPC: G02F1/1343 , G02F1/1335
CPC classification number: G02F1/133528 , G02F1/134336 , G02F2001/133548 , H01L27/12
Abstract: A display panel, a display device and a manufacturing method thereof are provided to use an electrode of the display device as a polarizing panel, thereby removing the polarizing panel arranged at the rear of the display panel and simplifying the processes. A gate line is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate line. A data line is crossed with the gate line and includes a source electrode. A drain electrode(175) is located oppositely to the source electrode. Plural line patterns(193) are electrically connected with the drain electrode and polarizes the incidence light beam. The distance of line patterns is below 200 nanometer. The width of the line pattern is below 100 nanometer. An alignment layer is formed on the electrode. The electrode includes at least one among Al, Ag, Cu, Mo, Cr, Ta, Ti or alloy thereof. The gate insulating layer includes an opened pixel area.
Abstract translation: 提供显示面板，显示装置及其制造方法以使用显示装置的电极作为偏振面板，从而去除布置在显示面板后部的偏振片，并简化了工艺。 在基板上形成栅极线。 栅极绝缘层形成在衬底上以覆盖栅极线。 数据线与栅极线交叉并且包括源电极。 漏电极（175）位于与源电极相对的位置。 多个线图案（193）与漏电极电连接并使入射光束偏振。 线条的距离低于200纳米。 线图案的宽度低于100纳米。 在电极上形成取向层。 电极包括Al，Ag，Cu，Mo，Cr，Ta，Ti或其合金中的至少一种。 栅极绝缘层包括开放的像素区域。
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Patent Agency Ranking
公开(公告)号：KR100925458B1
公开(公告)日：2009-11-06
申请号：KR1020030003299
申请日：2003-01-17
Applicant: 삼성전자주식회사
IPC: G02F1/136
CPC classification number: G02F1/13458 , G02F1/136227 , G02F1/136286 , H01L27/12 , H01L27/124 , H01L27/1288
Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.
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公开(公告)号：KR100900545B1
公开(公告)日：2009-06-02
申请号：KR1020020074687
申请日：2002-11-28
Applicant: 삼성전자주식회사
IPC: G09G3/36
Abstract: 본 발명은 액정 표시 장치 등과 같은 평판 디스플레이 장치에서 그래픽 신호 생성 모듈과 액정 표시 모듈 사이 또는 액정 표시 모듈 내의 타이밍 제어 IC와 데이터 드라이버 IC 사이 등에 적용될 수 있는 디지털 데이터 송수신 회로에 관한 것이다.
본 발명의 디지털 데이터 송수신 회로에는 제1전류원과 제2전류원이 구비되어 있으며, 상기 제2전류원은 입력 데이터의 하위 비트 상태에 따라 공급 여부가 제어된다. 상기 제1 및 제2전류원이 합해지는 노드에는 송신단이 연결되어 있으며, 입력 데이터의 상위 비트 상태에 따라 상기 두 전류원에 의한 전류의 전송 경로가 결정된다. 상기 송신단의 신호는 전송선을 통해 전달되며, 상기 전송선에는 종단 저항이 연결되어 있다. 수신단은 상기 종단 저항에 걸리는 전압에 따라 출력 데이터를 검출한다. 본 발명의 디지털 데이터 송수신 회로는 하나의 클럭 주기동안 2비트의 데이터를 전송할 수 있고, 전압을 전송하는 방식에 비해 노이즈(noise)에 강하며, 장거리 전송에 효과적이다.
디지털 인터페이스, LVDS, TMDS, 전류 전달 방식-
公开(公告)号：KR1020080077492A
公开(公告)日：2008-08-25
申请号：KR1020070017104
申请日：2007-02-20
Applicant: 삼성전자주식회사
IPC: G02F1/1343
CPC classification number: G02F1/134363 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136222
Abstract: A display panel and a method for manufacturing the same are provided to suppress the short circuit while forming a coupling capacitor and a storage capacitor, thereby improving the reliability of process and increasing the productivity of the display panel. A pixel area(PA) is defined on a first base substrate(110), wherein the pixel area has a first pixel area(MPA) and a second pixel area(SPA) adjacent to the first pixel area. A thin film transistor(T) is formed on the first base substrate. A passivation layer(132) is formed above the thin film transistor to cover the entire surface of the first base substrate. Color filters(160) are formed on the passivation layer. A first pixel electrode is disposed in the first pixel area, and electrically connected to a drain electrode(152) of the thin film transistor. A second pixel electrode(172a) is disposed in the second pixel area, and electrically insulated from the first pixel electrode. A coupling electrode is disposed in the same layer as the drain electrode to face the second pixel electrode. The coupling electrode is electrically connected to the first pixel electrode. A second base substrate(210) is oppositely coupled with the first base substrate. A common electrode(230) is formed on the second base substrate. The common electrode is disposed to face the first pixel electrode and the second pixel electrode.
Abstract translation: 提供显示面板及其制造方法，以在形成耦合电容器和存储电容器的同时抑制短路，从而提高处理的可靠性并提高显示面板的生产率。 像素区域（PA）被限定在第一基板（110）上，其中像素区域具有与第一像素区域相邻的第一像素区域（MPA）和第二像素区域（SPA）。 薄膜晶体管（T）形成在第一基底上。 钝化层（132）形成在薄膜晶体管上方以覆盖第一基底基板的整个表面。 滤色器（160）形成在钝化层上。 第一像素电极设置在第一像素区域中，并且电连接到薄膜晶体管的漏电极（152）。 第二像素电极（172a）设置在第二像素区域中，与第一像素电极电绝缘。 耦合电极设置在与漏电极相同的层中以面对第二像素电极。 耦合电极电连接到第一像素电极。 第二基底（210）与第一基底相对地连接。 公共电极（230）形成在第二基底基板上。 公共电极被设置为面对第一像素电极和第二像素电极。
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公开(公告)号：KR1020080073017A
公开(公告)日：2008-08-08
申请号：KR1020070011496
申请日：2007-02-05
Applicant: 삼성전자주식회사
IPC: G02F1/136 , G02F1/1333
CPC classification number: H01L27/1218 , G02F1/1333 , G02F2001/133302 , G02F2001/133357 , H01L27/1214 , H01L29/78603
Abstract: A display substrate and a method for manufacturing the same are provided to improve the surface flatness of a soda lime glass substrate and reduce the elution of alkali component, thereby suppressing display defects and device defects. An alkali-based glass substrate(110) is prepared, wherein the alkali-based glass substrate has a surface waviness less than 0.06um and a surface roughness less than 20Å. A gate electrode(124) is formed on the substrate. A gate insulating layer(140) and a semiconductor(151) are sequentially formed on the gate electrode. A source electrode(173) and a drain electrode(175) are formed on the gate insulating layer and the semiconductor. A pixel electrode(191) is formed on the resultant substrate to be connected to the drain electrode. The insulating substrate is formed of soda lime glass containing alkali component such as Na2O, CaO, and MgO.
Abstract translation: 提供显示基板及其制造方法，以提高钠钙玻璃基板的表面平坦度，减少碱成分的洗脱，从而抑制显示缺陷和器件缺陷。 制备碱性玻璃基板（110），其中碱性玻璃基板的表面波纹小于0.06um，表面粗糙度小于20。 在基板上形成栅电极（124）。 栅极绝缘层（140）和半导体（151）依次形成在栅电极上。 在栅极绝缘层和半导体上形成源极（173）和漏极（175）。 在所得到的衬底上形成像素电极（191），以连接到漏电极。 绝缘基板由含有Na 2 O，CaO，MgO等碱成分的钠钙玻璃构成。
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公开(公告)号：KR1020060126160A
公开(公告)日：2006-12-07
申请号：KR1020050047861
申请日：2005-06-03
Applicant: 삼성전자주식회사
IPC: G02F1/136 , H01L21/31 , H01L29/786
CPC classification number: G02F1/136 , H01L21/31 , H01L29/786
Abstract: A display device, a manufacturing method thereof and a mask are provided to use the storage capacitance as a storage electrode pattern and a pixel electrode, thereby removing a flicker and/or an afterimage. A storage electrode(120) is arranged on a substrate(110) and maintains the pixel voltage applied to a pixel electrode(170) during the time of one frame. The storage electrode includes a molybdenum pattern including molybdenum and an aluminium pattern. The aluminum pattern is preferably arranged on the molybdenum pattern. The storage pattern is formed by an aluminium pattern or an aluminium alloy pattern. A dielectric layer(130) is formed on the storage electrode pattern and insulates the storage electrode pattern from the pixel electrode.
Abstract translation: 提供显示装置，其制造方法和掩模，以将存储电容用作存储电极图案和像素电极，从而消除闪烁和/或残像。 存储电极（120）布置在基板（110）上，并且在一帧期间保持施加到像素电极（170）的像素电压。 存储电极包括钼图案，包括钼和铝图案。 铝图案优选地布置在钼图案上。 存储图案由铝图案或铝合金图案形成。 在存储电极图案上形成电介质层（130），并使存储电极图案与像素电极绝缘。
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