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公开(公告)号：KR1020090129754A
公开(公告)日：2009-12-17
申请号：KR1020080055835
申请日：2008-06-13
Applicant: 삼성전자주식회사
CPC classification number: H05K1/0271 , H01L2924/0002 , H05K1/144 , H05K1/181 , H05K2201/0133 , H05K2201/10159 , H05K2201/10265 , H05K2201/10734 , H01L2924/00
Abstract: PURPOSE: A semiconductor module is provided to suppress noise or vibration by using a restoring force of an elastic member. CONSTITUTION: In a device, a semiconductor module includes a module body(10) and a shock absorber(20) installed at the module body. The module body includes a circuit board(11) and a semiconductor package(1). The connection terminal is installed at the lower of the circuit board. A solder ball(2) is installed in one-side of the semiconductor package. The semiconductor package is installed in both sides of the circuit board. The shock absorbing unit protects the semiconductor package from impact supplied to the module body. The shock absorbing unit is installed in one side of the module body. The height(h1) of the shock absorbing unit is higher than the thickness(t) of the semiconductor package.
Abstract translation: 目的：提供一种通过使用弹性部件的恢复力来抑制噪声或振动的半导体模块。 构成：在装置中，半导体模块包括安装在模块体上的模块本体（10）和减震器（20）。 模块主体包括电路板（11）和半导体封装（1）。 连接端子安装在电路板的下部。 焊料球（2）安装在半导体封装的一侧。 半导体封装安装在电路板的两侧。 冲击吸收单元保护半导体封装免受供应到模块体的冲击。 减震单元安装在模块主体的一侧。 冲击吸收单元的高度（h1）高于半导体封装的厚度（t）。
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公开(公告)号：KR1020080005739A
公开(公告)日：2008-01-15
申请号：KR1020060064470
申请日：2006-07-10
Applicant: 삼성전자주식회사
CPC classification number: H01L2224/16145
Abstract: A semiconductor package and a semiconductor module protecting a passive component are provided to protect a top part of the passive component by a package lid of the semiconductor package. A semiconductor package includes a plurality of semiconductor packages(11), a connection member, and a package lid(13). The semiconductor packages including an uppermost semiconductor package are vertically stacked. The connection member electrically connects the semiconductor packages. The package lid is installed on the uppermost semiconductor package. The package lid extends larger than that of the semiconductor packages in both directions opposed to each other. The semiconductor package is a ball grid array package. The semiconductor packages are electrically connected to each other.
Abstract translation: 提供保护无源部件的半导体封装和半导体模块，以通过半导体封装的封装盖来保护无源部件的顶部。 半导体封装包括多个半导体封装（11），连接构件和封装盖（13）。 包括最上半导体封装的半导体封装被垂直堆叠。 连接构件电连接半导体封装。 封装盖安装在最上面的半导体封装上。 封装盖在两个方向相反的方向上比半导体封装的延伸更大。 半导体封装是一个球栅阵列封装。 半导体封装彼此电连接。
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公开(公告)号：KR1020070074966A
公开(公告)日：2007-07-18
申请号：KR1020060003159
申请日：2006-01-11
Applicant: 삼성전자주식회사
CPC classification number: H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L24/26 , H01L21/76838 , H01L23/498 , H01L25/074
Abstract: A substrate for a Pb-free solder joint is provided to cause a wicking phenomenon in a Pb-free solder joint process by increasing the volume of a Pb-free solder in a lead part. A semiconductor chip package has an outer lead(17b) protruding to the outside of a resin molding part. Substrate pads(53) are joined by a Pb-free solder. An insulation layer(55) is formed in a manner that exposes the substrate pads to the outside. The outer lead, the substrate pads and the insulation layer are formed on a substrate(50). The substrate pads have a lead attach region corresponding to the attach surface of the lead, a front margin region formed in the lengthwise direction of the lead from the lead attach region to the outside of the package, and a rear margin region formed in the opposite direction to the lengthwise direction of the lead in the front margin region. A predetermined part of the rear margin region is removed to make the front margin region larger than the rear margin region so that the front margin region and the rear margin region are unbalanced with respect to the lead attach region. The lead can be a Sn-Bi plating layer, and the Pb-free solder can be Sn-Ag-Cu.
Abstract translation: 提供无铅焊点的基板，通过增加引线部分中的无铅焊料的体积，在无铅焊接工艺中引起芯吸现象。 半导体芯片封装具有向树脂成型部的外侧突出的外引线（17b）。 衬底焊盘（53）通过无铅焊料连接。 绝缘层（55）以将衬底焊盘暴露于外部的方式形成。 外引线，基板焊盘和绝缘层形成在基板（50）上。 衬底焊盘具有对应于引线的附着表面的引线附着区域，沿引线长度方向从引线附着区域到封装外部形成的前边缘区域和形成在相反的引线附近区域的后边缘区域 方向到前缘区域中铅的长度方向。 去除后边缘区域的预定部分以使前边缘区域大于后边缘区域，使得前边缘区域和后边缘区域相对于引线附着区域不平衡。 铅可以是Sn-Bi镀层，无铅焊料可以是Sn-Ag-Cu。
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公开(公告)号：KR1020100045306A
公开(公告)日：2010-05-03
申请号：KR1020080104428
申请日：2008-10-23
Applicant: 삼성전자주식회사
CPC classification number: H01L23/24 , H01L25/105 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2225/1005 , H01L2225/1058 , H01L2924/00014 , H05K3/284 , H05K2201/10515 , H05K2201/10734 , H05K2201/2018 , H05K2203/1316 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: PURPOSE: A semiconductor packaging apparatus is provided to secure a space in which semiconductor components are mounted by exposing a filling layer and the upper side of the semiconductor groups. CONSTITUTION: A plurality of first semiconductor package groups(SPG1) is arranged on a base plate(10). A side pillar(66) is upwardly expanded from the main surface of the base plate. A filling layer is contacted to the side pillar and is arranged between the first semiconductor package groups. Each of first semiconductor package group includes a semiconductor package. The side pillar is contacted to the lateral sides of the first semiconductor package groups.
Abstract translation: 目的：提供半导体封装装置，通过暴露半导体组的填充层和上侧来固定安装半导体部件的空间。 构成：多个第一半导体封装组（SPG1）布置在基板（10）上。 侧柱（66）从基板的主表面向上膨胀。 填充层与侧柱接触并且布置在第一半导体封装组之间。 第一半导体封装组中的每一个包括半导体封装。 侧柱与第一半导体封装组的侧面接触。
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公开(公告)号：KR101483274B1
公开(公告)日：2015-01-16
申请号：KR1020080104428
申请日：2008-10-23
Applicant: 삼성전자주식회사
CPC classification number: H01L23/24 , H01L25/105 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2225/1005 , H01L2225/1058 , H01L2924/00014 , H05K3/284 , H05K2201/10515 , H05K2201/10734 , H05K2201/2018 , H05K2203/1316 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: 반도체 패키징 장치(Semiconductor Packaging Device)를 제공할 수 있다. 이를 위해서, 기저 판(Base Plate) 상에 반도체 패키지 그룹(Semiconductor Package Group)들, 사이드 필러(Side Pillar) 및 충진막(Filling Layer)이 배치될 수 있다. 상기 사이드 필러는 반도체 패키지 그룹들 주변에 위치할 수 있다. 상기 충진막은 사이드 필러 및 반도체 패키지 그룹들 사이에 배치될 수 있다.
반도체, 패키지, 필러, 충진막-
Patent Agency Ranking
公开(公告)号：KR1020090005488A
公开(公告)日：2009-01-14
申请号：KR1020070068568
申请日：2007-07-09
Applicant: 삼성전자주식회사
CPC classification number: B23K1/008 , B23K2201/40
Abstract: A reflow apparatus and a reflow method are provided to reduce a phenomenon that a portion of a solder, a flux and others spatter in a process of proceeding the reflow process, and to reduce a phenomenon that voids are generated in a solder joint in the process of proceeding the reflow process. A reflow apparatus(100) comprises a first heating part(130) and a second heating part(150). The first heating part melts a solder on a substrate(90) such that an electronic component mounted on the substrate is soldered onto the substrate. The first heating part heats the solder on the substrate to a point just prior to a melting point of the solder in the atmospheric pressure state. The second heating part is connected to the first heating part. The second heating part heats the solder on the substrate heated by the first heating part to a solder melting range that is not less than the melting point in the vacuum state.
Abstract translation: 提供回流装置和回流方法以减少在进行回流处理的过程中焊料，焊剂等的一部分飞溅的现象，并且减少在该过程中在焊接接头中产生空隙的现象 进行回流处理。 回流装置（100）包括第一加热部（130）和第二加热部（150）。 第一加热部件将衬底（90）上的焊料熔化，使得安装在衬底上的电子部件焊接到衬底上。 第一加热部件将基板上的焊料加热到处于大气压状态的焊料的熔点之前的点。 第二加热部与第一加热部连接。 第二加热部将由第一加热部加热的基板上的焊料加热至不低于真空状态的熔点的焊料熔化范围。
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公开(公告)号：KR100702515B1
公开(公告)日：2007-04-02
申请号：KR1020050051976
申请日：2005-06-16
Applicant: 삼성전자주식회사
IPC: H05K13/04
CPC classification number: H05K13/0417 , Y10T29/49131 , Y10T29/53178 , Y10T29/53183 , Y10T29/53191 , Y10T29/53261
Abstract: 본 발명은 전자부품 실장 장치에 관한 것으로, 전자부품을 흡착하는 헤드 노즐의 자화(磁化)에 따른 공정 불량을 방지하기 위한 것이다. 본 발명에 따른 전자부품 실장 장치는 자화 제거부를 구비하며, 자화 제거부는 코일을 통해 흐르는 교류에 의해 교번 자계를 만든다. 자화 제거부는 헤드 노즐이 지나가는 경로 상에 설치되므로, 주기적으로 자화 제거부에 전원을 공급함으로써 자화 제거부를 이용하여 헤드 노즐의 자화 현상을 자동으로 제거할 수 있다. 본 발명에 따른 자화 제거 방법은 자화 제거 주기를 비롯하여 노즐 구동 조건과 자화 제거 조건을 설정할 수 있다.
전자부품, 마운트 헤드, 헤드 노즐, 자화, 자화 제거, 교번 자계-
公开(公告)号：KR1020060131487A
公开(公告)日：2006-12-20
申请号：KR1020050051976
申请日：2005-06-16
Applicant: 삼성전자주식회사
IPC: H05K13/04
CPC classification number: H05K13/0417 , Y10T29/49131 , Y10T29/53178 , Y10T29/53183 , Y10T29/53191 , Y10T29/53261
Abstract: An electronic component mounting apparatus having a demagnetizer and a demagnetizing method are provided to realize a high speed of electronic component mounting apparatus by removing magnetization effect of a head nozzle. In an electronic component mounting apparatus having a demagnetizer, at least one mount head(120) is installed on a head table. A head nozzle(122) is installed on a bottom end of the mount head(120). A component supplying unit adsorbs the electronic components to the head nozzle(122). A component sensing unit is arranged around the head table to sense the position of the electronic component. A component mounting unit is arranged around the head table to mount the electronic component on the printed circuit board. And, a demagnetizing unit(160) is arranged around the head table to generate an alternative magnetic field for removing the magnetization of the head nozzle(122).
Abstract translation: 提供具有去磁器和退磁方法的电子部件安装装置，通过去除头部喷嘴的磁化效应来实现电子部件安装装置的高速化。 在具有去磁器的电子部件安装装置中，至少一个安装头（120）安装在头台上。 喷头（122）安装在安装头（120）的底端。 元件供给单元将电子部件吸附到头喷嘴（122）。 组件感测单元布置在头台周围以感测电子部件的位置。 元件安装单元布置在头台周围以将电子元件安装在印刷电路板上。 并且，在头台周围布置一退磁单元（160），以产生用于去除头喷嘴（122）的磁化的替代磁场。
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公开(公告)号：KR101660787B1
公开(公告)日：2016-10-11
申请号：KR1020090090006
申请日：2009-09-23
Applicant: 삼성전자주식회사
CPC classification number: B23K1/0016 , B23K3/0623 , H01L21/4853 , H01L23/13 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/98 , H01L2224/13017 , H01L2224/13082 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13186 , H01L2224/13562 , H01L2224/13564 , H01L2224/13566 , H01L2224/16058 , H01L2224/48091 , H01L2224/4824 , H01L2224/8102 , H01L2224/81193 , H01L2224/81232 , H01L2224/81359 , H01L2224/81399 , H01L2224/8192 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/0102 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H05K3/225 , H05K3/3436 , H05K3/3494 , H05K2201/10734 , H05K2203/1163 , H05K2203/176 , Y02P70/613 , H01L2924/00014 , H01L2924/01083
Abstract: 솔더볼 접합방법은솔더볼에제1 물질을도포하고, 솔더볼이부착될기판의패드에제1 물질과발열반응하는제2 물질을도포하고, 제1 물질과제2 물질이반응하도록솔더볼과패드를접촉시킨후, 제1 물질과제2 물질의발열반응시발생하는열을이용하여솔더볼과패드를접합한다.
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公开(公告)号：KR101466236B1
公开(公告)日：2014-11-28
申请号：KR1020080055835
申请日：2008-06-13
Applicant: 삼성전자주식회사
CPC classification number: H05K1/0271 , H01L2924/0002 , H05K1/144 , H05K1/181 , H05K2201/0133 , H05K2201/10159 , H05K2201/10265 , H05K2201/10734 , H01L2924/00
Abstract: 본 발명은 반도체 모듈에 관한 것으로서, 적어도 하나 이상의 반도체 패키지가 설치되는 모듈 몸체; 및 취급 부주의로 인한 추락 등에 의해 상기 모듈 몸체에 가해지는 충돌체와의 충격으로부터 상기 반도체 패키지가 보호되도록 충돌체와 충돌이 예상되는 상기 모듈 몸체의 일측에 설치되는 충격 완충 부재;를 포함하여 이루어지는 것을 특징으로 하기 때문에 추락이나 충돌체와의 충격이나 진동 등에 의한 반도체 패키지와 회로 기판 사이의 접속 단락을 방지할 수 있고, 좁은 공간에서도 모듈의 설치를 가능하게 하여 공간의 효율적인 이용이 가능하며, 탄성부재의 복원력에 의해 보다 견고한 고정으로 소음이나 진동의 발생을 억제할 수 있는 효과를 갖는다.
충격 완충 부재, 코일 스프링, 높이, 반도체 패키지, BGA 패키지
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