-
公开(公告)号：KR101673920B1
公开(公告)日：2016-11-09
申请号：KR1020100068207
申请日：2010-07-15
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78
CPC classification number: H01L21/823814 , H01L21/823864 , H01L29/7848
Abstract: 탄소도핑영역을형성한반도체장치의제조방법이개시되어있다. 기판상에게이트구조물을형성하고, 게이트구조물측벽상에희생스페이서를형성한후, 제1 이온주입공정을통해기판상부에제1 불순물을주입하여소스/드레인영역을형성한다. 사용된희생스페이서를제거한다. 게이트구조물을이온주입마스크로사용하는제2 이온주입공정을통해, 기판상부에제1 불순물및 탄소를주입하여소스/드레인확장영역및 탄소도핑영역을각각형성한다. 탄소도핑영역을형성하기이전에열처리함에따라탄소도핑영역에서의탄소비활성화를방지할수 있고, 희생스페이서의사용으로탄소도핑영역들사이의간격이좁아져채널영역에인가되는인장스트레스가증가될수 있다.
-
公开(公告)号：KR1020130063875A
公开(公告)日：2013-06-17
申请号：KR1020110130478
申请日：2011-12-07
Applicant: 삼성전자주식회사
IPC: H01L27/108 , H01L21/8242
CPC classification number: H01L23/49827 , H01L27/10814 , H01L27/10852 , H01L27/10876 , H01L27/10891 , H01L28/91 , H01L2924/0002 , H01L2924/00
Abstract: PURPOSE: A semiconductor device is provided to reduce leakage current due to a support part by forming an amorphous metal oxide. CONSTITUTION: Electrode structures(180) are repetitively arranged on a substrate(100) in an X direction and a Y direction. A first support part(160) and a second support part(170) are positioned between the electrode structures. A first and a second support part include the first support layer(162,172), a second support layer(164,174), and a third support layer(166,176). The first support layer and the third support layer include an amorphous metal oxide. The thickness(T12) of the second support layer is the same as or larger than thicknesses(T11,T13) of the first support layer and the third support layer.
Abstract translation: 目的：提供半导体器件，以通过形成非晶金属氧化物来减少由于支撑部分引起的漏电流。 构成：电极结构（180）在X方向和Y方向上重复地布置在基板（100）上。 第一支撑部分（160）和第二支撑部分（170）位于电极结构之间。 第一和第二支撑部分包括第一支撑层（162,172），第二支撑层（164,174）和第三支撑层（166,176）。 第一支撑层和第三支撑层包括无定形金属氧化物。 第二支撑层的厚度（T12）与第一支撑层和第三支撑层的厚度（T11，T13）相同或更大。
-
公开(公告)号：KR101673908B1
公开(公告)日：2016-11-09
申请号：KR1020100067763
申请日：2010-07-14
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78 , H01L21/8238
CPC classification number: H01L21/823807 , H01L21/823814 , H01L29/7848
Abstract: 반도체소자제조방법에서, 기판상에게이트구조물을형성한다. 게이트구조물에인접한기판의부분상에실리콘을포함하는에피택시얼(epitaxial) 층을형성한다. 게이트구조물을이온주입마스크로사용하여, 에피택시얼층 및기판상부에불순물및 탄소를주입함으로써, 각각올려진소스드레인(ESD) 층및 불순물영역을형성한다. ESD 층상에금속실리사이드막을형성한다. 불순물영역은충분한탄소를포함하므로, 채널영역에인장력을인가하여전자의이동도가향상된다.
-
公开(公告)号：KR1020120007162A
公开(公告)日：2012-01-20
申请号：KR1020100067763
申请日：2010-07-14
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78 , H01L21/8238
CPC classification number: H01L21/823807 , H01L21/823814 , H01L29/7848 , H01L21/265
Abstract: PURPOSE: A semiconductor device and manufacturing method thereof are provided to improve the electron mobility of a channel region by applying a tensile force in the channel region which is formed between impurity regions. CONSTITUTION: A gate structure(150) is formed on a substrate(100). The gate structure comprises a gate dielectric layer pattern(110), a gate electrode(120), and a gate mask(130). An epitaxial layer including silicon is formed on a part of the substrate which is adjacent to the gate structure. An ESD(Elevated Source Drain) layer(165) and an impurity region(170) are formed by injecting impurities and carbon into the epitaxial layer and an upper part of the substrate. A metal silicide layer is formed on the ESD layer.
Abstract translation: 目的：提供一种半导体器件及其制造方法，通过在形成于杂质区域之间的沟道区域中施加张力来提高沟道区域的电子迁移率。 构成：在衬底（100）上形成栅极结构（150）。 栅极结构包括栅极电介质层图案（110），栅极电极（120）和栅极掩模（130）。 在与栅极结构相邻的衬底的一部分上形成包括硅的外延层。 通过将杂质和碳注入外延层和衬底的上部来形成ESD（升高的源极漏极）层（165）和杂质区（170）。 在ESD层上形成金属硅化物层。
-
Patent Agency Ranking
公开(公告)号：KR102065684B1
公开(公告)日：2020-01-13
申请号：KR1020130045183
申请日：2013-04-24
Applicant: 삼성전자주식회사
IPC: H01L27/108 , H01L21/8242
-
公开(公告)号：KR1020120007589A
公开(公告)日：2012-01-25
申请号：KR1020100068207
申请日：2010-07-15
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78
CPC classification number: H01L21/823814 , H01L21/823864 , H01L29/7848 , H01L21/28141
Abstract: PURPOSE: A method for manufacturing a semiconductor device is provided to improve a driving current property of a transistor by increasing tension stress applied to a channel region. CONSTITUTION: A gate structure is formed on a substrate. A sacrificial spacer is formed on the sidewall of a gate structure. A source/drain region(162) is formed by implanting a first impurity to the upper side of the substrate through a first ion implantation process. The used sacrificial spacer is removed. A source/drain extension region(172) and a carbon doping region(182) are formed by implanting the first impurity and carbon to the upper side of the substrate through a second ion implantation process using the gate structure as an ion implantation mask.
Abstract translation: 目的：提供一种用于制造半导体器件的方法，通过增加施加到沟道区的张力来提高晶体管的驱动电流特性。 构成：在衬底上形成栅极结构。 在栅极结构的侧壁上形成牺牲隔离物。 通过第一离子注入工艺将第一杂质注入到衬底的上侧形成源/漏区（162）。 去除所用的牺牲隔离物。 通过使用栅极结构作为离子注入掩模的第二离子注入工艺，将第一杂质和碳注入衬底的上侧，形成源极/漏极延伸区域（172）和碳掺杂区域（182）。
-
公开(公告)号：KR101934037B1
公开(公告)日：2018-12-31
申请号：KR1020120132422
申请日：2012-11-21
Applicant: 삼성전자주식회사
IPC: H01L27/108 , H01L21/8242
-
公开(公告)号：KR1020140126915A
公开(公告)日：2014-11-03
申请号：KR1020130045183
申请日：2013-04-24
Applicant: 삼성전자주식회사
IPC: H01L27/108 , H01L21/8242
CPC classification number: H01L21/283 , H01L21/76805 , H01L29/401
Abstract: 본 발명은 반도체 장치 및 이의 제조 방법을 제공한다. 본 발명에서는, 콘택홀을 형성할 때 발생되는 콘택 잔여물이 몰드막이 아닌 보호막과 접한다. 상기 보호막은 상기 콘택 잔여물과 상기 몰드막 사이의 반응을 방지한다. 이로써 하부전극들 간의 누설전류를 방지할 수 있다.
Abstract translation: 提供半导体器件及其制造方法。 在本发明中，形成接触孔时产生的接触残渣与保护层而不是模层接触。 保护层防止接触残余物和模具层之间的反应。 由此，可以防止下部电极之间的漏电流。
-
公开(公告)号：KR1020140065186A
公开(公告)日：2014-05-29
申请号：KR1020120132422
申请日：2012-11-21
Applicant: 삼성전자주식회사
IPC: H01L27/108 , H01L21/8242
CPC classification number: H01L28/60 , H01L27/10852 , H01L28/87 , H01L28/91
Abstract: A plurality of lower electrodes are arranged on a substrate. A first and a second supporter are formed between the lower electrodes. An upper electrode is formed on the lower electrodes. A capacitor dielectric layer is arranged between the lower electrodes and the upper electrode. The first supporter has a first element, a second element, and oxygen (O). The adhesion property of the oxide of the first element to the lower electrodes is better than the second supporter. The band gap energy of the oxide of the second element is higher than the oxide of the first element.
Abstract translation: 多个下电极设置在基板上。 第一和第二支撑件形成在下电极之间。 上电极形成在下电极上。 在下电极和上电极之间设置有电容器电介质层。 第一支持物具有第一元素，第二元素和氧（O）。 第一元件的氧化物与下电极的粘合性优于第二支持体。 第二元素的氧化物的带隙能量高于第一元素的氧化物。
-
-
-
-
-
-
-
-
Search Results
9
records
(took 0.02 seconds)
