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公开(公告)号:KR102238755B1
公开(公告)日:2021-04-12
申请号:KR1020170086652A
申请日:2017-07-07
Applicant: 한국전자통신연구원
IPC: H01L21/02 , H01L21/225 , H01L21/324
CPC classification number: H01L21/02378 , H01L21/02225 , H01L21/2253 , H01L21/324
Abstract: 본 발명은 전력 반도체 소자의 제조방법에 관한 것으로, 기판의 상부에 이온주입 영역 및 이온주입 영역의 적어도 일부를 둘러싸는 가드링 영역을 형성하는 것, 기판 상에 이온주입 영역 및 가드링 영역을 덮는 제1 절연막을 형성하는 것, 제1 절연막을 열처리하는 것 및 제1 절연막 상에 제1 절연막 보다 두꺼운 제2 절연막을 형성하는 것을 포함하되, 기판은 실리콘 카바이드를 포함하고, 열처리는 질소(N) 원소를 포함하는 가스를 이용하여 수행되는 전력 반도체 소자의 제조방법이 제공된다.
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公开(公告)号:KR1020140092209A
公开(公告)日:2014-07-23
申请号:KR1020130129431
申请日:2013-10-29
Applicant: 한국전자통신연구원
IPC: H01L29/08
Abstract: The present invention provides a structure of a semiconductor power rectifying device. The structure of the semiconductor power rectifying device includes a first conductivity type doped substrate; a second electrode which is provided on the lower surface of the substrate; an active region and a field region which are defined on the substrate; a gate which is provided on the active region; a gate insulating layer which is provided between the gate and the substrate; body regions which are provided in the substrate adjacent to the first and second sides of the gate which face each other and are doped with the dopant of a second conductivity type which is different from the first conductivity type; and a plug region of a second conductivity type which is formed in the substrate adjacent to the third and the forth sides of the gate which connect the first and the second sides.
Abstract translation: 本发明提供一种半导体功率整流装置的结构。 半导体功率整流装置的结构包括第一导电型掺杂衬底; 设置在基板的下表面上的第二电极; 限定在所述基板上的有源区域和场区域; 设置在有源区上的栅极; 栅极绝缘层,其设置在所述栅极和所述基板之间; 本体区域设置在与栅极的第一和第二侧相邻的衬底中,所述第一和第二侧彼此面对并且掺杂有与第一导电类型不同的第二导电类型的掺杂物; 以及第二导电类型的插塞区域,其形成在与栅极的连接第一和第二侧面的第三和第四侧相邻的基板中。
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公开(公告)号:KR101087136B1
公开(公告)日:2011-11-25
申请号:KR1020080122215
申请日:2008-12-04
Applicant: 한국전자통신연구원
IPC: H01L21/324
Abstract: 본 발명은 실리콘 웨이퍼 기판의 적재가 용이할 뿐만 아니라 초기 열산화 공정 시 발생될 수 있는 자연 산화막 발생을 최대한 억제할 수 있고, 반응 가스의 균일할 확산을 유도하여 균일한 두께의 산화막을 발생시킬 수 있는 반도체 제조용 횡형 확산로에 관한 것으로서, 상기 횡형 확산로는, 상하로 개폐가능하며 그 내부에 다수의 실리콘 웨이퍼 기판이 적재되는 적재 수단과, 상기 적재 수단을 수평 방향으로 이동시켜 상기 반응실 내부로 이동시키는 운반 수단과, 상기 운반 수단에 의해 적재 수단이 반응실 내부로 이동되는 동안 상기 적재 수단의 내부로 질소 가스를 주입하는 질소 가스 주입 수단을 포함하여 이루어진다.
반도체 제조, 열산화, 열확산, 확산로,-
公开(公告)号:KR101016441B1
公开(公告)日:2011-02-21
申请号:KR1020080124277
申请日:2008-12-08
Applicant: 한국전자통신연구원
IPC: H01L29/786
Abstract: 본 발명은 게이트 전극과 소스-드레인 전극 형상 간 오정렬을 방지하고 제조 수율을 향상시킬 수 있는 하부 게이트형 유기박막 트랜지스터 제조 방법을 제공한다. 본 발명에 따른 유기박막 트랜지스터 제조 방법은, 게이트 전극과 게이트 절연막이 형성된 기판 전면 상에 형상반전 감광막과 광 표백물질막을 도포하는 단계와, 마스크를 사용하여 상기 형상반전 감광막 중에서 필드 영역의 감광막만을 선택적으로 감광시키는 단계와, 상기 형상 반전 감광막 중에서 상기 게이트 전극 상부에 위치한 감광막이 감광되고 소스-드레인 전극 형성 영역의 감광막은 감광되지 않도록 전면 노광을 실시하는 단계와, 상기 전면 노광 후, 상기 광 표백물질막을 제거하고, 감광된 상기 필드 영역 및 게이트 전극 상부의 감광막을 형상 반전시키는 단계와, 전면 노광을 실시하여, 형상 반전되지 않은 상기 소스-드레인 전극 형성 영역의 감광막을 감광시키는 단계와, 상기 감광된 소스-드레인 전극 형성 영역의 감광막을 현상액으로 제거하는 단계를 포함한다.
유기박막 트랜지스터, 게이트 전극-
公开(公告)号:KR100934216B1
公开(公告)日:2009-12-29
申请号:KR1020070125515
申请日:2007-12-05
Applicant: 한국전자통신연구원
IPC: H01L29/70
Abstract: A bipolar phototransistor for a short wavelength and a manufacturing method thereof are provided to improve the characteristic of a leakage current by forming an anti-depletion layer in a surface of a base. A first base is formed in a base region(20) by the high energy ion implantation of a first type impurity. A second oxide film is formed in the front side of the substrate. An emitter region(30) and a blocking region are defined in a second oxide film. A second emitter and a second blocking layer are formed by ion-implanting a second impurity to the emitter region and the blocking region. A second anti-depletion layer is formed by ion-implanting the second impurity to the surface of the first base.
Abstract translation: 提供一种用于短波长的双极光电晶体管及其制造方法,以通过在基底的表面中形成抗耗尽层来改善泄漏电流的特性。 通过第一类型杂质的高能离子注入在基区(20)中形成第一基极。 第二氧化物膜形成在衬底的正面。 发射极区域(30)和阻挡区域被限定在第二氧化物膜中。 通过将第二杂质离子注入发射极区域和阻挡区域来形成第二发射极和第二阻挡层。 通过将第二杂质离子注入第一基底的表面来形成第二抗耗尽层。
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公开(公告)号:KR1020090058768A
公开(公告)日:2009-06-10
申请号:KR1020070125515
申请日:2007-12-05
Applicant: 한국전자통신연구원
IPC: H01L29/70
CPC classification number: H01L31/1105
Abstract: A bipolar phototransistor for a short wavelength and a manufacturing method thereof are provided to improve the characteristic of a leakage current by forming an anti-depletion layer in a surface of a base. A first base is formed in a base region(20) by the high energy ion implantation of a first type impurity. A second oxide film is formed in the front side of the substrate. An emitter region(30) and a blocking region are defined in a second oxide film. A second emitter and a second blocking layer are formed by ion-implanting a second impurity to the emitter region and the blocking region. A second anti-depletion layer is formed by ion-implanting the second impurity to the surface of the first base.
Abstract translation: 提供一种用于短波长的双极光电晶体管及其制造方法,以通过在基底表面形成抗耗尽层来改善漏电流的特性。 通过第一类型杂质的高能离子注入,在基极区(20)中形成第一基底。 第二氧化膜形成在基板的正面。 在第二氧化物膜中限定发射极区域(30)和阻挡区域。 通过向发射极区域和阻挡区域离子注入第二杂质形成第二发射极和第二阻挡层。 通过将第二杂质离子注入第一基底的表面形成第二抗耗尽层。
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公开(公告)号:KR100872775B1
公开(公告)日:2008-12-09
申请号:KR1020070077862
申请日:2007-08-02
Applicant: 한국전자통신연구원
Abstract: The horizontal diffusion furnace for fabricating semiconductor wafer is provided to facilitate the loading of the silicon wafer in the boat by using a boat having a cover in the thermal oxidation process of the semiconductor wafer. The horizontal diffusion furnace for fabricating semiconductor wafer comprises the reaction chamber(11), the boat(15), the support stand, the carriage(19), the gas injector(17), the gas inlet pipe(13). The reaction chamber has the heating coil(12). The boat has the cover(152) for opening and closing. One or more wafer(16) can be loaded on the boat. The support stand supports the boat. The carriage is combined with the one-side part of the support stand. The carriage moves the boat supported by the support stand to the reaction chamber. The gas injector is formed in the one-side part of the support stand. The gas injector injects the gas into the boat in which wafer is loaded. The gas inlet pipe is formed in the longitudinal direction of the support stand to supply the gas injected through the gas injector to the boat.
Abstract translation: 提供用于制造半导体晶片的水平扩散炉,以通过在半导体晶片的热氧化过程中使用具有盖的船来促进硅晶片在船中的装载。 用于制造半导体晶片的水平扩散炉包括反应室(11),船(15),支撑架,托架(19),气体注入器(17),进气管(13)。 反应室具有加热线圈(12)。 船具有用于打开和关闭的盖(152)。 一个或多个晶片(16)可以装载在船上。 支撑架支撑船。 托架与支撑架的单侧部分组合。 托架将由支撑架支撑的船移动到反应室。 气体喷射器形成在支撑架的一侧部分中。 气体喷射器将气体注入到其中装载晶片的船中。 气体入口管沿着支撑台的纵向方向形成,以将通过气体喷射器喷射的气体供应到船上。
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公开(公告)号:KR100835379B1
公开(公告)日:2008-06-04
申请号:KR1020060123992
申请日:2006-12-07
Applicant: 한국전자통신연구원
IPC: H01L21/02
Abstract: A chamber condition monitoring method using a quadrupole mass spectrometer is provided to reduce a manufacturing time by performing a seasoning process or monitoring a change of states. A measuring process is performed to measure dissociated ions or mass and energy distribution of reaction kinds of plasma, and density of radicals by using a quadrupole mass spectrometer. A producing process is performed to produce relative distribution of the dissociated ions, and an ionization ratio of the plasma by using the measured results. The ionization ratio of the plasma, the relative distribution and ratio of the dissociated ions, and the density of the radicals are with a normal state of a plasma apparatus(S340). A seasoning process for the process chamber is performed to change a produced value to a normal range when the determined result exceeds the normal range(S350-S380).
Abstract translation: 提供使用四极质谱仪的室状态监测方法,通过进行调味处理或监测状态的变化来减少制造时间。 使用四极质谱仪进行测量过程,以测量离子的离子或反应种类的质量和能量分布以及自由基的密度。 通过使用测定结果,进行离子化离子的相对分布和等离子体的离子化比的制造工序。 等离子体的离子化比例,离解离子的相对分布和比例以及自由基的密度与等离子体装置的正常状态(S340)相同。 当确定结果超过正常范围时,执行处理室的调味处理以将产生的值改变到正常范围(S350-S380)。
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公开(公告)号:KR100782312B1
公开(公告)日:2007-12-06
申请号:KR1020060104179
申请日:2006-10-25
Applicant: 한국전자통신연구원
IPC: H01L27/146 , B82Y20/00
CPC classification number: H01L27/14689 , H01L27/14609
Abstract: A high quality CMOS image sensor and a photo diode are provided to reduce the signal loss of a short wavelength by using a high concentration p-type SiGeC thin film. An inner n-type region(16(deep-N)) is formed on a lower portion of a surface of a p-type well(14(p-well)). A photo diode includes a surface p-type region(18) formed with a high concentration p-type SiGeC epi layer or a poly thin film that are deposited on the surface of the p-type well on an upper portion of the n-type region. A transfer transistor transfers a photo-induced charge generated from the photo diode to a floating diffusion node. A driving transistor amplifies a potential change of the floating diffusion node by the photo-induced charge. The floating diffusion node region includes an n-type signal transfer layer for applying potential from a drain of the transfer transistor and a gate of the driving transistor. Doping density of the p-type well adjacent to the lower part of the n-type signal transfer layer is 6X10^15/cm^3 to 1X10^16/cm^3. Doping density of the inner n-type region is 7X10^15/cm^3 to 1X10^16/cm^3.
Abstract translation: 提供了高质量CMOS图像传感器和光电二极管,以通过使用高浓度p型SiGeC薄膜来减少短波长的信号损失。 内部n型区域(16(深N))形成在p型阱(14(p阱))的表面的下部。 光电二极管包括形成有高浓度p型SiGeC外延层或多晶薄膜的表面p型区域(18),其沉积在n型阱上部的p型阱表面上 地区。 传输晶体管将从光电二极管产生的光感应电荷传输到浮动扩散节点。 驱动晶体管通过光感应电荷放大浮动扩散节点的电位变化。 浮动扩散节点区域包括用于从转移晶体管的漏极和驱动晶体管的栅极施加电位的n型信号传递层。 与n型信号转移层的下部相邻的p型阱的掺杂密度为6×10 ^ 15 / cm 3〜1×10 ^ 16 / cm 3。 内部n型区域的掺杂密度为7×10 ^ 15 / cm 3〜1×10 ^ 16 / cm 3。
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公开(公告)号:KR100725261B1
公开(公告)日:2007-06-07
申请号:KR1020050119005
申请日:2005-12-07
Applicant: 한국전자통신연구원
Abstract: A method of manufacturing a nano material is provided to increase reliability of specimen analysis through a transmission electronic microscope and precisely defining a three-dimensional structure of the nano material. A method of manufacturing a nano material includes the steps of mixing a specimen material(205) with a coupling agent(206) such as adhesive, curing, and other materials, inserting the specimen mixture(210), in which the specimen material mixed with the coupling agent, into a tune(211), heating the tube, in which the specimen material is contained, to cure the specimen mixture, cutting the cured specimen material in the tube by appropriate sizes, and flattening the specimen mixture in the cut tube. The tube is heated to 120 to 150 degrees of centigrade for ten minutes.
Abstract translation: 提供制造纳米材料的方法,以通过透射电子显微镜提高样本分析的可靠性并精确地定义纳米材料的三维结构。 制造纳米材料的方法包括以下步骤:将样本材料(205)与诸如粘合剂,固化和其他材料的偶联剂(206)混合;将样本混合物(210)插入样本混合物(210) (211)中,加热其中包含样本材料的管,以固化样本混合物,将管中固化的样本材料切割成合适的尺寸,并且将切割管中的样本混合物变平 。 将管加热至120至150摄氏度十分钟。
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