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    Lead-free semiconductor package
    1.
    发明专利
    Lead-free semiconductor package 未知

    公开(公告)号：GB2442391B

    公开(公告)日：2010-12-08

    申请号：GB0800312

    申请日：2006-04-19

    Applicant: ADVANCED MICRO DEVICES INC

    Inventor： MASTER RAJ N ,  ANNAD SRINIVASAN ASHOK ,  PARTHASARATHY SRINIVASAN ,  MUI YEW CHEONG

    IPC: H01L21/60 ,  B23K35/26 ,  C22C13/02 ,  H01L23/498 ,  H05K3/34

    Abstract: A package substrate includes die solder pads and pin solder fillets. The pin solder fillets might comprise between approximately 90 wt % to approximately 99 wt % tin and approximately 10 wt % to 1 wt % antimony. The die solder pads might comprise between approximately 4 wt % to approximately 8 wt % bismuth, approximately 2 wt % to approximately 4 wt % silver, approximately 0 wt % to approximately 0.7 wt % copper, and approximately 87 wt % to approximately 92 wt % tin. The die solder pads might comprise between approximately 7 wt % to approximately 20 wt % indium, between approximately 2 wt % to approximately 4.5 wt % silver, between approximately 0 wt % to approximately 0.7 wt % copper, between approximately 0 wt % to approximately 0.5 wt % antimony, and between approximately 74.3 wt % to approximately 90 wt % tin.

    Lead-free semiconductor package
    3.
    发明专利
    Lead-free semiconductor package 未知

    公开(公告)号：GB2442391A

    公开(公告)日：2008-04-02

    申请号：GB0800312

    申请日：2006-04-19

    Applicant: ADVANCED MICRO DEVICES INC

    Inventor： MASTER RAJ N ,  ANNAD SRINIVASAN ASHOK ,  PARTHASARATHY SRINIVASAN ,  MUI YEW CHEONG

    IPC: H01L21/60 ,  B23K35/26 ,  C22C13/02 ,  H01L23/498 ,  H05K3/34

    Abstract: A package substrate (4) includes die solder pads (3) and pin solder fillets (5). The pin solder fillets (5) might comprise between approximately 90 wt % to approximately 99 wt % tin and approximately 10 wt % to 1 wt % antimony. The die solder pads (3) might comprise between approximately 4 wt % to approximately 8 wt % bismuth, approximately 2 wt % to approximately 4 wt % silver, approximately 0 wt % to approximately 0.7 wt % copper, and approximately 87 wt % to approximately 92 wt % tin. The die solder pads (3) might comprise between approximately 7 wt % to approximately 20 wt % indium, between approximately 2 wt % to approximately 4.5 wt % silver, between approximately 0 wt % to approximately 0.7 wt % copper, between approximately 0 wt % to approximately 0.5 wt % antimony, and between approximately 74.3 wt % to approximately 90 wt % tin.

    Controlled and programmed deposition of flux on a flip-chip die by spraying
    4.
    发明专利
    Controlled and programmed deposition of flux on a flip-chip die by spraying 未知

    公开(公告)号：AU8117801A

    公开(公告)日：2002-03-04

    申请号：AU8117801

    申请日：2001-08-07

    Applicant: ADVANCED MICRO DEVICES INC

    Inventor： MASTER RAJ N ,  KHAN MOHAMMAD Z ,  GUARDADO MARIA G ,  ONG OOI TONG

    IPC: B23K1/20 ,  H05K3/34

    Abstract: A method and apparatus are provided for controllably dispensing flux on a substrate having a plurality of conductive terminals. Flux having a viscosity range between 10 centipoises and about 150 centipoises is sprayed on the substrate and the conductive terminals at a valve pressure range between about 1.5 psi and about 30 psi via a dispense nozzle of a flux dispenser. Upon a subsequent high temperature solder reflow process, the sprayed flux on the substrate is mostly removed by thermal decomposition to volatile species, thereby significantly reducing flux residue remaining on the surface of the substrate between the conductive terminals.

    5.
    发明专利
    未知

    公开(公告)号：DE112006001732T5

    公开(公告)日：2008-05-21

    申请号：DE112006001732

    申请日：2006-04-19

    Applicant: ADVANCED MICRO DEVICES INC

    Inventor： MASTER RAJ N ,  ANNAD SRINIVASAN ASHOK ,  PARTHASARATHY SRINIVASAN ,  MUI YEW CHEONG

    IPC: H01L21/60 ,  B23K35/26 ,  C22C13/00 ,  H01L23/498

    Abstract: A package substrate includes die solder pads and pin solder fillets. The pin solder fillets might comprise between approximately 90 wt % to approximately 99 wt % tin and approximately 10 wt % to 1 wt % antimony. The die solder pads might comprise between approximately 4 wt % to approximately 8 wt % bismuth, approximately 2 wt % to approximately 4 wt % silver, approximately 0 wt % to approximately 0.7 wt % copper, and approximately 87 wt % to approximately 92 wt % tin. The die solder pads might comprise between approximately 7 wt % to approximately 20 wt % indium, between approximately 2 wt % to approximately 4.5 wt % silver, between approximately 0 wt % to approximately 0.7 wt % copper, between approximately 0 wt % to approximately 0.5 wt % antimony, and between approximately 74.3 wt % to approximately 90 wt % tin.

    CONTROLLED AND PROGRAMMED DEPOSITION OF FLUX ON A FLIP-CHIP DIE BY SPRAYING
    8.
    发明申请
    CONTROLLED AND PROGRAMMED DEPOSITION OF FLUX ON A FLIP-CHIP DIE BY SPRAYING 审中-公开
    通过喷涂控制和程序化在倒芯片模头上的通量沉积

    公开(公告)号：WO0216068A3

    公开(公告)日：2002-06-06

    申请号：PCT/US0124843

    申请日：2001-08-07

    Applicant: ADVANCED MICRO DEVICES INC

    Inventor： MASTER RAJ N ,  KHAN MOHAMMAD Z ,  GUARDADO MARIA G ,  ONG OOI TONG

    IPC: B23K1/20 ,  H05K3/34

    CPC classification number: H05K3/3489 ,  B23K1/203 ,  B23K2201/36 ,  H05K3/3436

    Abstract: A method and apparatus are provided for controllably dispensing flux (30) on a substrate (26) having a plurality of conductive terminals (12A, 12B, 20). Flux (30) having a viscosity range between 10 centipoises and about 150 centipoises is sprayed on the substrate (26) and the conductive terminals (12A, 12B, 20) at a valve pressure range between about 1.5 psi and about 30 psi via a dispense nozzle of a flux dispenser (22). Upon a subsequent high temperature solder reflow process, the sprayed flux (30) on the substrate (26) is mostly removed by thermal decomposition to volatile species, thereby significantly reducing flux residue remaining on the surface of the substrate (26) between the conductive terminals (12A, 12B, 30).

    Abstract translation: 提供了一种用于在具有多个导电端子（12A，12B，20）的基板（26）上可控地分配助熔剂（30）的方法和装置。 具有介于10厘泊与约150厘泊之间粘度范围的通量（30）经由分配在约1.5psi与约30psi之间的阀压力范围喷射到基板（26）和导电端子（12A，12B，20） 通量分配器（22）的喷嘴。 在随后的高温回流焊过程中，基板（26）上的喷射通量（30）大部分通过热分解除去至挥发性物质上，从而显着减少残留在基板（26）的表面上的导电端子 （12A，12B，30）。

    BOAT FOR BALL ATTACH MANUFACTURING PROCESS AND METHOD OF FABRICATING RELIABLE FLIP-CHIP ASSEMBLY
    9.
    发明申请
    BOAT FOR BALL ATTACH MANUFACTURING PROCESS AND METHOD OF FABRICATING RELIABLE FLIP-CHIP ASSEMBLY 审中-公开
    用于球连接制造工艺的船和制造可靠的片芯组件的方法

    公开(公告)号：WO03023820A8

    公开(公告)日：2004-05-27

    申请号：PCT/US0226451

    申请日：2002-08-19

    Applicant: ADVANCED MICRO DEVICES INC

    Inventor： MASTER RAJ N ,  ALCID EDWARD S ,  DING DIONG-HING ,  CHAN CHEON-SENG ,  ONG OOI-TONG

    IPC: H01L21/673 ,  H05K3/34 ,  H01L21/00

    CPC classification number: H05K3/3478 ,  H05K2201/09945 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/082

    Abstract: A boat (10) onto which solder balls (16) or columns are loaded for an attach process can be used in a universal attach line has a number of attach stations (32-44) to accommodate different types of attach processes. Depending on the process and the desired configuration and form factor of the array of solder balls (16) or columns, a template (14a, 14b) is selected that covers some of the holes (12) in the universal boat (10), and exposes other holes (12). The holes (12) are configured and sized to hold solder balls (16) in the holes (12) such that the solder balls (16) protrude above the top surface of the boat (10) by a predetermined height. This prevents damage to the solder balls (16) while ensuring that the solder balls (16) protrude enough to accommodate imperfectly flat packages that are placed on the array of solder balls (16) held in the boat (10). Vacuum applied through the holes (12) help to securely hold the balls (16) in place, and a substrate (18) is placed onto the solder balls (16). Once loaded with balls (16) or columns, the boat (10) is transported to only the appropriate attach stations in the universal attach line, where the different attach operations for a given attach process, such as high temperature ball attach, eutectic ball attach, or column attach, are performed. Also provided is a method of fabricating laminate assemblies that determines the ideal weight (W) of underfill to be dispensed, based on the size of the semiconductor die (144) and the gap (142) between the die (144) and the laminate substrate. Underfill (150) is dispensed in a single step in an amount between 1.1W and 1.3W to form fillets (52, 54) that cover at least 15% of the height of the semiconductor die (144) on all four sides of the die. The amount of underfill (150) ensures that the fillet coverage imbalance is 30% or less for each of the pairs of opposing sides of the die (144), thereby improving solder joint reliability.

    Abstract translation: 可以在通用连接线中使用装载有焊球（16）或列的船（10），其具有多个附接站（32-44）以适应不同类型的附接过程。 根据工艺和焊球（16）或列阵列的期望配置和形状因素，选择覆盖通用船（10）中的一些孔（12）的模板（14a，14b），以及 露出其他孔（12）。 孔（12）的构造和尺寸被设计成将焊球（16）保持在孔（12）中，使得焊球（16）突出在船（10）的顶表面上预定高度。 这防止了焊球（16）的损坏，同时确保焊球（16）足够突出以容纳放置在保持在舟皿（10）中的焊球（16）阵列上的不完全平坦的封装。 通过孔（12）施加的真空有助于将球（16）牢固地保持就位，并且将衬底（18）放置在焊球（16）上。 一旦装载了球（16）或列，船只（10）只能被传送到通用连接线中的适当的附属站，在给定的附着过程中，例如高温球附着，共晶球附着 或列附加。 还提供了一种制造叠层组件的方法，其基于半导体管芯（144）的尺寸和模具（144）和层叠基板之间的间隙（142）确定待分配的底部填充物的理想重量（W） 。 底部填充物（150）以1.1W和1.3W之间的量分散在单个步骤中以形成在模具的所有四个侧面上覆盖半导体管芯（144）的至少15％的高度的圆角（52,54） 。 底部填充物（150）的量确保了模具（144）的每对相对侧中的每一对的圆角覆盖不平衡为30％以下，从而提高焊点可靠性。

    SELECTIVE FLUX DEPOSITION
    10.
    发明申请
    SELECTIVE FLUX DEPOSITION 审中-公开
    选择性通量沉积

    公开(公告)号：WO0217380A3

    公开(公告)日：2002-05-30

    申请号：PCT/US0124151

    申请日：2001-07-31

    Applicant: ADVANCED MICRO DEVICES INC

    Inventor： BROWNFIELD TERRI J ,  MASTER RAJ N

    IPC: B23K1/20 ,  B23K3/08 ,  H01L21/60 ,  H05K3/34 ,  H01L23/485

    CPC classification number: H01L24/81 ,  B23K1/203 ,  B23K3/082 ,  H01L24/11 ,  H01L24/75 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/742 ,  H01L2224/75 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30107 ,  H05K3/3436 ,  H05K3/3489

    Abstract: A method and apparatus are provided for selectively depositing flux (16) on a plurality of flip-chip bumps (12) arranged on a semiconductor (10) by mounting a flux stamp (24) on the semiconductor chip (10). The flux stamp (24) has a plurality of flux holes (26) arranged in a pattern substantially identically corresponding to the arrangement of the flip-chip bumps (12) of the semiconductor chip (10). Different flux stamps are prepared for various kinds of semiconductor chips having different flip-chip bump arrangements. Flux (16) is deposited though the flux holes (26) of the flux stamp (24) which selectively exposing the upper surfaces of the flip-chip bumps of the chip (10), thereby leaving no flux on the chip surface between the flip-chip bumps (12).

    Abstract translation: 提供了一种方法和装置，用于通过在半导体芯片（10）上安装磁通量（24）来选择性地在布置在半导体（10）上的多个倒装芯片凸块（12）上沉积磁通（16）。 磁通印记（24）具有以与半导体芯片（10）的倒装芯片凸块（12）的布置基本相同的形式布置的多个磁通孔（26）。 为具有不同倒装芯片凸块布置的各种半导体芯片准备不同的磁通量戳。 焊剂（16）通过选择性地暴露芯片（10）的倒装芯片凸块的上表面的磁通量（24）的磁通孔（26）沉积，从而在芯片表面上没有磁通 芯片凸块（12）。

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