公开(公告)号：WO2002065517A2

公开(公告)日：2002-08-22

申请号：PCT/US2002/004750

申请日：2002-02-12

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A.

IPC: H01L21/00

CPC classification number: C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

Abstract: Trisilane is used in chemical vapor deposition methods to deposit silicon-containing films over mixed substrates. Such methods are useful in semiconductor manufacturing to provide a variety of advantages, including uniform deposition over heterogeneous surfaces, high deposition rates, and higher manufacturing productivity. An example is in forming the base region of a heterojunction bipolar transistor, including simultaneous deposition over both single crystal semiconductor surfaces and amorphous insulating regions.

Abstract translation: 三氯硅烷用于化学气相沉积方法以在混合的基底上沉积含硅膜。 这种方法在半导体制造中可用于提供各种优点，包括在异质表面上的均匀沉积，高沉积速率和更高的制造生产率。 例如，形成异质结双极晶体管的基极区域，包括在单晶半导体表面和非晶绝缘区域上的同时沉积。

公开(公告)号：WO2004097897A3

公开(公告)日：2004-11-11

申请号：PCT/US2004/012239

申请日：2004-04-21

Applicant: ASM AMERICA, INC. ,  TODD, Michael, A. ,  WEEKS, Keith, D.

Inventor： TODD, Michael, A. ,  WEEKS, Keith, D.

IPC: C23C16/00

Abstract: Methods for controlling the grain structure of a polycrystalline Si-containing film involve depositing the film in stages so that the morphology of a first film layer deposited in an initial stage favorably influences the morphology of a second film layer deposited in a later stage. In an illustrated embodiment, the initial stage includes an anneal step. In another embodiment, the later stage involves depositing the second layer under different deposition conditions than for the first layer.

公开(公告)号：WO2002064853A3

公开(公告)日：2002-08-22

申请号：PCT/US2002/004751

申请日：2002-02-12

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A. ,  RAAIJMAKERS, Ivo

IPC: H01L21/205

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize trisilane as a silicon source. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

公开(公告)号：WO2004017365A2

公开(公告)日：2004-02-26

申请号：PCT/US2003/022976

申请日：2003-07-24

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A.

IPC: H01L

CPC classification number: C30B29/06 ,  C23C16/24 ,  C23C16/325 ,  C30B25/02 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262

Abstract: Chemical vapor deposition methods are used to deposit amorphous silicon-containing films over various substrates. Such methods are useful in semiconductor manufacturing to provide a variety of advantages, including uniform deposition over heterogeneous surfaces, high deposition rates, and higher manufacturing productivity. Preferably, the deposited amorphous silicon-containing film is annealed to produce crystalline regions over all or part of an underlying substrate.

Abstract translation: 使用化学气相沉积方法在各种衬底上沉积非晶态含硅膜。 这种方法在半导体制造中可用于提供各种优点，包括在异质表面上的均匀沉积，高沉积速率和更高的制造生产率。 优选地，沉积的非晶态含硅膜被退火以在下面的基底的全部或部分上产生结晶区域。

公开(公告)号：WO2002065517A3

公开(公告)日：2002-08-22

申请号：PCT/US2002/004750

申请日：2002-02-12

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A.

IPC: H01L21/205

Abstract: Trisilane is used in chemical vapor deposition methods to deposit silicon-containing films over mixed substrates. Such methods are useful in semiconductor manufacturing to provide a variety of advantages, including uniform deposition over heterogeneous surfaces, high deposition rates, and higher manufacturing productivity. An example is in forming the base region of a heterojunction bipolar transistor, including simultaneous deposition over both single crystal semiconductor surfaces and amorphous insulating regions.

公开(公告)号：WO2002064853A2

公开(公告)日：2002-08-22

申请号：PCT/US2002/004751

申请日：2002-02-12

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A. ,  RAAIJMAKERS, Ivo

IPC: C23C16/00

CPC classification number: C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize trisilane as a silicon source. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

Abstract translation: 通过使用丙硅烷作为硅源的沉积方法制备薄的平滑的含硅膜。 在优选的实施方案中，该方法产生连续的并且具有约150或更小的厚度，大约5范围或更小的表面粗糙度和约20％或更小的厚度不均匀性的含Si薄膜。 当与其它元素掺杂或合金化时，优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率，并且可以用于制备各种有用的结构，例如润湿层，HSG硅，量子点，电介质层，抗反射涂层（ARC），栅电极和扩散源。

公开(公告)号：WO2004009861A2

公开(公告)日：2004-01-29

申请号：PCT/US2003/022393

申请日：2003-07-18

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A. ,  WEEKS, Keith, D. ,  WERKHOVEN, Christiaan, J. ,  POMAREDE, Christophe, F.

IPC: C23C

CPC classification number: C23C16/45523 ,  C23C16/24 ,  C23C16/345 ,  C23C16/45525 ,  C23C16/56 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/3144 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/3185

Abstract: Multiple sequential processes 140 are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited 100 on a substrate using trisilane as the silicon precursor. The silicon precursor is removed 110 from the reaction chamber. A silicon nitride layer is then formed by nitriding 120 the silicon layer. The nitrogen reactant is removed 110 from the reaction chamber. By repeating these steps 100, 110, 120 and 130, a silicon nitride layer of a desired thickness is formed.

Abstract translation: 在反应室中进行多个连续工艺140以形成包括氮化硅层的超高质量含硅化合物层。 在优选实施例中，使用丙硅烷作为硅前体将硅层沉积在基板上。 从反应室中除去硅前体110。 然后通过将硅层氮化120来形成氮化硅层。 从反应室中除去氮气反应物110。 通过重复这些步骤100,110,120和130，形成所需厚度的氮化硅层。

公开(公告)号：WO2002080244A3

公开(公告)日：2002-10-10

申请号：PCT/US2002/002921

申请日：2002-02-01

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A. ,  HAWKINS, Mark, R.

IPC: H01L21/205

Abstract: Chemical vapor deposition processes utilize chemical precursors that allow for the deposition of thin films to be conducted at or near the mass transport limited regime. The processes have high deposition rates yet produce more uniform films, both compositionally and in thickness, than films prepared using conventional chemical precursors. In preferred embodiments, trisilane is employed to deposit thin films containing silicon useful in the semiconductor industry in various applications such as transistor gate electrodes.

公开(公告)号：WO2002065508A2

公开(公告)日：2002-08-22

申请号：PCT/US2002/004743

申请日：2002-02-12

Applicant: ASM AMERICA, INC.

Inventor： TODD, Michael, A.

IPC: H01L

CPC classification number: C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

Abstract: Silicon alloys and doped silicon films are prepared by chemical vapor deposition and ion implantation processes using Si-containing chemical precursors as sources for Group III and Group V atoms. Preferred dopant precursors include (H3Si)3-xMRx, (H3Si)3N, and (H3Si)4N2, wherein R is H or D, x = 0, 1 or 2, and M is selected from the group consisting of B, P, As, and Sb. Preferred deposition methods produce non-hydrogenated silicon alloy and doped Si-containing films, including crystalline films.

Abstract translation: 硅化合物和掺杂硅膜通过化学气相沉积和离子注入工艺制备，使用含Si化学前体作为第III族和第V族原子的来源。 优选的掺杂剂前体包括（H3Si）3-xMRx，（H3Si）3N和（H3Si）4N2，其中R是H或D，x = 0,1或2，并且M选自B，P， As和Sb。 优选的沉积方法产生非氢化硅合金和掺杂的含Si膜，包括晶体膜。

公开(公告)号：WO2002065525A1

公开(公告)日：2002-08-22

申请号：PCT/US2002/004745

申请日：2002-02-12

Applicant: ASM AMERICA, INC.

Inventor： POMAREDE, Christophe ,  GIVENS, Michael, E. ,  SHERO, Eric, J. ,  TODD, Michael, A.

IPC: H01L21/28

CPC classification number: H01L21/28194 ,  B82Y10/00 ,  C23C16/0272 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28525 ,  H01L21/28556 ,  H01L29/4925 ,  H01L29/517 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521

Abstract: Methods are provided herein for forming electrode layers over high dielectric constant ("high k") materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is first formed (70) and then protected from reduction during a subsequent deposition (79) of silicon-containing gate electrode. In particular, a seed deposition phase (74) includes conditions designed for minimizing hydrogen reduction of the gate dielectric, including low hydrogen content, low temperatures and/or low partial pressures of the silicon source gas. Conditions are preferably altered (76) for higher deposition rates and deposition continues in a bulk phase (78). Desirably, though, hydrogen diffusion is still minimized by controlling the above-noted parameters. In one embodiment, high k dielectric reduction is minimized through omission of a hydrogen carrier gas. In another embodiment, a higher order silanes, such as disilane and trisilane, aid in reducing hydrogen content for a given deposition rate.

Abstract translation: 本文提供了用于在高介电常数（“高k”）材料上形成电极层的方法。 在所示实施例中，首先形成高k栅极电介质，例如氧化锆，然后在随后的含硅栅电极的沉积（79）期间保护不被还原。 特别地，种子沉积阶段（74）包括设计用于最小化栅极电介质的氢还原的条件，包括硅源气体的低氢含量，低温和/或低分压。 优选改变条件（76）以获得更高的沉积速率，并且在体相中继续沉积（78）。 然而，尽管通过控制上述参数仍然使氢扩散最小化。 在一个实施例中，通过省略氢载体气体来最小化高k电介质的减小。 在另一个实施方案中，高级硅烷如乙硅烷和丙硅烷可有助于降低给定沉积速率的氢含量。