METHOD FOR APPLYING A DEPOSITION MODEL IN A SEMICONDUCTOR MANUFACTURING PROCESS

    公开(公告)号:WO2021001109A1

    公开(公告)日:2021-01-07

    申请号:PCT/EP2020/065400

    申请日:2020-06-04

    Abstract: A method for applying a deposition model in a semiconductor manufacturing process is described. The method comprises predicting a deposition profile of a substrate using the deposition model; and using the predicted deposition profile to enhance a metrology target design. The deposition model is calibrated using experimental cross-section profile information from a layer of a physical wafer. In some embodiments, the deposition model is a machine-learning model, and calibrating the deposition model comprises training the machine-learning model. The metrology target design may comprise an alignment metrology target design or an overlay metrology target design, for example.

    METROLOGY USING A PLURALITY OF METROLOGY TARGET MEASUREMENT RECIPES

    公开(公告)号:WO2018095705A1

    公开(公告)日:2018-05-31

    申请号:PCT/EP2017/077958

    申请日:2017-11-01

    CPC classification number: G03F7/70633 G03F7/70625 G03F7/70683

    Abstract: A method of measuring a parameter of a patterning process, the method including obtaining a measurement of a substrate processed by a patterning process, with a first metrology target measurement recipe; obtaining a measurement of the substrate with a second, different metrology target measurement recipe, wherein measurements using the first and second metrology target measurement recipes have their own distinct sensitivity to a metrology target structural asymmetry of the patterning process; and determining a value of the parameter by a weighted combination of the measurements of the substrate using the first and second metrology target measurement recipes, wherein the weighting reduces or eliminates the effect of the metrology target structural geometric asymmetry on the parameter of the patterning process determined from the measurements using the first and second metrology target measurement recipes.

    MEASURING A PROCESS PARAMETER FOR A MANUFACTURING PROCESS INVOLVING LITHOGRAPHY
    5.
    发明申请
    MEASURING A PROCESS PARAMETER FOR A MANUFACTURING PROCESS INVOLVING LITHOGRAPHY 审中-公开
    测量涉及平面图的制造工艺的工艺参数

    公开(公告)号:WO2015124391A1

    公开(公告)日:2015-08-27

    申请号:PCT/EP2015/051680

    申请日:2015-01-28

    Abstract: There is disclosed a method of measuring a process parameter for a manufacturing process involving lithography. In a disclosed arrangement the method comprises performing first and second measurements of overlay error in a region on a substrate, and obtaining a measure of the process parameter based on the first and second measurements of overlay error. The first measurement of overlay error is designed to be more sensitive to a perturbation in the process parameter than the second measurement of overlay error by a known amount.

    Abstract translation: 公开了一种测量涉及光刻的制造工艺的工艺参数的方法。 在公开的布置中,该方法包括对基板上的区域中的覆盖误差执行第一和第二测量,并且基于重叠误差的第一和第二测量值获得处理参数的度量。 重叠误差的第一次测量被设计为对过程参数中的扰动比已知量的覆盖误差的第二次测量更敏感。

    SUBSTRATE FOR USE IN METROLOGY, METROLOGY METHOD AND DEVICE MANUFACTURING METHOD
    7.
    发明申请
    SUBSTRATE FOR USE IN METROLOGY, METROLOGY METHOD AND DEVICE MANUFACTURING METHOD 审中-公开
    用于计量学,计量方法和器件制造方法的基板

    公开(公告)号:WO2012022584A1

    公开(公告)日:2012-02-23

    申请号:PCT/EP2011/062739

    申请日:2011-07-25

    CPC classification number: G03F7/70683 G03F1/44 G03F7/70633

    Abstract: A pattern from a patterning device is applied to a substrate. The applied pattern includes device functional areas and metrology target areas. Each metrology target area comprises a plurality of individual grating portions, which are used for diffraction based overlay measurements or other diffraction based measurements. The gratings are of the small target type, which is small than an illumination spot used in the metrology. Each grating has an aspect ratio substantially greater than 1, meaning that a length in a direction perpendicular to the grating lines which is substantially greater than a width of the grating. Total target area can be reduced without loss of performance in the diffraction based metrology. A composite target can comprise a plurality of individual grating portions of different overlay biases. Using integer aspect ratios such as 2:1 or 4:1, grating portions of different directions can be packed efficiently into rectangular composite target areas.

    Abstract translation: 将来自图案形成装置的图案应用于基板。 应用模式包括设备功能区域和计量目标区域。 每个测量目标区域包括多个单独的光栅部分,其用于基于衍射的覆盖测量或其他基于衍射的测量。 光栅是小目标类型,小于计量中使用的照明点。 每个光栅具有基本上大于1的长宽比,这意味着垂直于光栅线的方向上的长度大致大于光栅的宽度。 可以减少总目标面积,而不会在基于衍射的计量学中失去性能。 复合目标可以包括不同覆盖偏移的多个单独光栅部分。 使用诸如2:1或4:1的整数长宽比,可以将不同方向的光栅部分有效地包装到矩形复合目标区域中。

    CALIBRATION METHOD, INSPECTION METHOD AND APPARATUS, LITHOGRAPHIC APPARATUS, AND LITHOGRAPHIC PROCESSING CELL
    9.
    发明申请
    CALIBRATION METHOD, INSPECTION METHOD AND APPARATUS, LITHOGRAPHIC APPARATUS, AND LITHOGRAPHIC PROCESSING CELL 审中-公开
    校准方法,检验方法和装置,光刻设备和光刻处理单元

    公开(公告)号:WO2010069757A1

    公开(公告)日:2010-06-24

    申请号:PCT/EP2009/066152

    申请日:2009-12-01

    Abstract: Disclosed are methods, apparatuses, and lithographic systems for calibrating an inspection apparatus. Radiation is projected onto a pattern in a target position of a substrate. By making a plurality of measurements of the pattern and comparing the measured first or higher diffraction orders of radiation reflected from the pattern of different measurements, a residual error indicative of the error in a scatterometer may be calculated. This error is an error in measurements of substrate parameters caused by irregularities of the scatterometer. The residual error may manifest itself as an asymmetry in the diffraction spectra.

    Abstract translation: 公开了用于校准检查装置的方法,装置和光刻系统。 辐射被投影到基板的目标位置的图案上。 通过对图案进行多次测量并比较从不同测量图案反射的辐射的测量的第一或更高的衍射级数,可以计算指示散射仪中的误差的残差。 该误差是由散射仪的不规则引起的衬底参数的测量误差。 残余误差可能表现为衍射光谱中的不对称性。

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