公开(公告)号：EP0907129A1

公开(公告)日：1999-04-07

申请号：EP98307413.9

申请日：1998-09-14

Applicant: Compaq Computer Corporation

Inventor： Sabotta, Michael L. ,  Grieff, Thomas W.

IPC: G06F13/40

CPC classification number: G06F13/4068 ,  Y10T307/675

Abstract: An isolation system and method that electrically couples a device to a bus during cycles associated with or accessing the device, but otherwise isolates the device from the bus. The isolation system includes an isolation device coupled to the device and to the bus that includes an enable input adapted to receive an enable signal, where the isolation device electrically couples the device to said bus while the enable signal is asserted, but otherwise electrically isolates the device from the bus. The isolation system further includes enable logic that detects cycles on the bus and provides the enable signal to the enable input ofthe isolation device during a cycle ifthe cycle is associated with the device. The isolation device may comprise a bus switch, one or more discrete isolating devices such as bipolar transistors, field-effect transistors, or any other suitable device for isolating a device from the bus. Generally, the enable logic may comprise decode logic that decodes an address on the bus during the bus cycle to determine if the address corresponds to an address of the device. Decode logic is useful for decoding a memory cycle on the bus for accessing a low voltage memory device, which is otherwise isolated from the bus.

Abstract translation: 隔离系统和方法做了电连接的装置，以一个总线或访问设备相关联的循环过程中，但在其他隔离从总线设备。 隔离系统包括：在耦合到所述器件隔离设备和所述总线确实包括在使能输入angepasst接收到使能信号，其中，所述隔离装置电耦合设备向所述总线，而所述使能信号被断言，但在其他电隔离 从总线设备。 所述隔离系统进一步包括使能逻辑做在总线上检测到周期和期间周期ifthe周期与所述设备相关联提供的使能信号，以隔离国税发装置使能输入。 隔离装置可以包括总线开关，一个或多个分立的隔离装置：如双极晶体管，场效应晶体管，或用于从总线隔离的装置的任何其它合适的装置。 一般地，使能逻辑可以包括解码逻辑解码的确，如果该地址在设备的地址对应于总线周期确定性矿期间寻址总线上。 解码逻辑是用于访问低电压存储器装置解码所述总线上的存储器周期是有用的，所有这一切都被以其他方式从总线隔离。

公开(公告)号：EP0824239A2

公开(公告)日：1998-02-18

申请号：EP97305893.6

申请日：1997-08-04

Applicant: Compaq Computer Corporation

Inventor： Lomelino, Lawrence W. ,  Grieff, Thomas W. ,  Sabotta, Michael L.

IPC: G06F13/42

CPC classification number: G06F13/4278

Abstract: The present invention relates to a secondary channel for a point-to-point burst style bus associated with a computer system. The point-to-point bus may originate as a standardized bus from a fibre channel controller. The point-to-point bus connects to another circuit which may be a bridge circuit, a minicomputer or a peripheral device. A secondary channel is also connected to the point-to-point bus and is adapted to share the bus by receiving information having predetermined addresses. The information recieved by the secondary channel can be stored in a memory that is shared with a processor.

Abstract translation: 本发明涉及一种与计算机系统相关联的点对点突发式总线的辅助信道。 点对点总线可以作为来自光纤通道控制器的标准化总线发起。 点对点总线连接到另一个可能是桥接电路，小型计算机或外围设备的电路。 辅助信道也连接到点对点总线，并且适于通过接收具有预定地址的信息来共享总线。 辅助通道接收的信息可以存储在与处理器共享的存储器中。

公开(公告)号：EP0886219A2

公开(公告)日：1998-12-23

申请号：EP98304744.0

申请日：1998-06-16

Applicant: Compaq Computer Corporation

Inventor： Santeler, Paul A. ,  Bacchus, Reza M. ,  Sabotta, Michael L.

IPC: G06F13/40

CPC classification number: G06F13/409

Abstract: The cage-supported hard disk drives in a computer server system are coupled to connectors on the cage back plane circuit boards and are controlled by a pair of array controller cards which are hot-plug connected in a redundant manner on the system I/O board using a pair of connectors mounted on the I/O board, each connector having first and second sets of electrical contacts thereon. Connector edge portions of the array controller cards are plugged into the I/O board connectors and have first and second sets of electrical contacts that engage the corresponding first and second sets of electrical contacts on their associated I/O board connectors. Formed on the I/O board are (1) a peripheral interconnect bus structure connected to the first sets of connector electrical contacts, (2) an electrical bus structure connected to the second sets of connector electrical contacts and associated cable connectors, and (3) an intercontroller bus structure connected between the second sets of connector electrical contacts and enabling the two array controller cards to communicate with one another independently of the peripheral interconnect bus structure. Electrical cables are interconnected between the electrical bus structure and the back plane circuit boards to couple the array controller cards thereto in a redundant control manner without requiring direct cable connection to either of the array controller cards.

Abstract translation: 计算机服务器系统中的笼支持的硬盘驱动器耦合到保持架背板电路板上的连接器，并由一对阵列控制器卡控制，这些阵列控制器卡以冗余方式热插拔连接到系统I / O板 使用安装在I / O板上的一对连接器，每个连接器在其上具有第一组和第二组电触点。 阵列控制器卡的连接器边缘部分插入到I / O板连接器中，并且具有与其相关联的I / O板连接器上的相应的第一组和第二组电触头相啮合的第一组和第二组电触头。 在I / O板上形成有（1）连接到第一组连接器电触头的外围互连总线结构，（2）连接到第二组连接器电触点和相关电缆连接器的电总线结构，（3） ）连接在所述第二组连接器电触点之间并且使得所述两个阵列控制器卡能够独立于所述外围互连总线结构彼此通信的互连控制器总线结构。 电气电缆在电气总线结构和背板电路板之间互连，以便以冗余的控制方式将阵列控制器卡耦合到其上，而不需要直接连接到任一阵列控制器卡。

公开(公告)号：EP0858036A2

公开(公告)日：1998-08-12

申请号：EP98300808.7

申请日：1998-02-04

Applicant: Compaq Computer Corporation

Inventor： Skidmore, Alan E. ,  Schultz, Stephen M. ,  Scholhamer, George J. ,  Thompson, Mark J. ,  Rushton, Tod D. ,  Freeman, Eugene E. ,  Alexander, Dennis J. ,  Callison, Ryan A. ,  Grieff, Thomas W. ,  Sabotta, Michael L. ,  Grant, David L. ,  McCarty, James F. ,  Schneider, Randy D. ,  Galloway, William C.

IPC: G06F13/42 ,  G06F3/06 ,  H04L29/06

CPC classification number: G06F11/201 ,  H04L12/433 ,  H04L67/42

Abstract: A system and/or network (50) for connecting at least one server (52) to at least one storage device (56) via a Fibre Channel (54). Such a system is capable of providing connection redundancy, high speed data rates, multiple operating systems and, hot plugging. Furthermore, the system allows for a large number of devices to be connected to the Fibre Channel. The devices, being servers, storage devices, or other system related appliances can be separated by more than 10 miles and still communicate via the Fibre Channel at high data rates.

Abstract translation: 一种用于经由光纤通道（54）将至少一个服务器（52）连接到至少一个存储设备（56）的系统和/或网络（50）。 这样的系统能够提供连接冗余，高速数据速率，多个操作系统和热插拔。 此外，系统允许大量设备连接到光纤通道。 作为服务器，存储设备或其他系统相关设备的设备可以分开超过10英里，并且仍然通过光纤通道以高数据速率进行通信。

公开(公告)号：EP0858036A3

公开(公告)日：1999-12-22

申请号：EP98300808.7

申请日：1998-02-04

Applicant: Compaq Computer Corporation

Inventor： Skidmore, Alan E. ,  Schultz, Stephen M. ,  Scholhamer, George J. ,  Thompson, Mark J. ,  Rushton, Tod D. ,  Freeman, Eugene E. ,  Alexander, Dennis J. ,  Callison, Ryan A. ,  Grieff, Thomas W. ,  Sabotta, Michael L. ,  Grant, David L. ,  McCarty, James F. ,  Schneider, Randy D. ,  Galloway, William C.

IPC: G06F13/42 ,  G06F3/06 ,  H04L29/06

CPC classification number: G06F11/201 ,  H04L12/433 ,  H04L67/42

Abstract: A system and/or network (50) for connecting at least one server (52) to at least one storage device (56) via a Fibre Channel (54). Such a system is capable of providing connection redundancy, high speed data rates, multiple operating systems and, hot plugging. Furthermore, the system allows for a large number of devices to be connected to the Fibre Channel. The devices, being servers, storage devices, or other system related appliances can be separated by more than 10 miles and still communicate via the Fibre Channel at high data rates.

公开(公告)号：EP0886219A3

公开(公告)日：1999-12-15

申请号：EP98304744.0

申请日：1998-06-16

Applicant: Compaq Computer Corporation

Inventor： Santeler, Paul A. ,  Bacchus, Reza M. ,  Sabotta, Michael L.

IPC: G06F13/40

CPC classification number: G06F13/409

Abstract: The cage-supported hard disk drives in a computer server system are coupled to connectors on the cage back plane circuit boards and are controlled by a pair of array controller cards which are hot-plug connected in a redundant manner on the system I/O board using a pair of connectors mounted on the I/O board, each connector having first and second sets of electrical contacts thereon. Connector edge portions of the array controller cards are plugged into the I/O board connectors and have first and second sets of electrical contacts that engage the corresponding first and second sets of electrical contacts on their associated I/O board connectors. Formed on the I/O board are (1) a peripheral interconnect bus structure connected to the first sets of connector electrical contacts, (2) an electrical bus structure connected to the second sets of connector electrical contacts and associated cable connectors, and (3) an intercontroller bus structure connected between the second sets of connector electrical contacts and enabling the two array controller cards to communicate with one another independently of the peripheral interconnect bus structure. Electrical cables are interconnected between the electrical bus structure and the back plane circuit boards to couple the array controller cards thereto in a redundant control manner without requiring direct cable connection to either of the array controller cards.

公开(公告)号：EP0824239A3

公开(公告)日：1999-07-28

申请号：EP97305893.6

申请日：1997-08-04

Applicant: Compaq Computer Corporation

Inventor： Lomelino, Lawrence W. ,  Grieff, Thomas W. ,  Sabotta, Michael L.

IPC: G06F13/42

CPC classification number: G06F13/4278

Abstract: The present invention relates to a secondary channel for a point-to-point burst style bus associated with a computer system. The point-to-point bus may originate as a standardized bus from a fibre channel controller. The point-to-point bus connects to another circuit which may be a bridge circuit, a minicomputer or a peripheral device. A secondary channel is also connected to the point-to-point bus and is adapted to share the bus by receiving information having predetermined addresses. The information recieved by the secondary channel can be stored in a memory that is shared with a processor.