公开(公告)号：JP2004118827A

公开(公告)日：2004-04-15

申请号：JP2003289426

申请日：2003-08-07

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ALCOE DAVID J ,  BLACKWELL KIM J ,  JADHAV VIRENDRA R

IPC: B42D15/10 ,  G06K19/077 ,  H01L23/00 ,  H01L23/10 ,  H01L23/12 ,  H01L23/16 ,  H01L23/31 ,  H01L23/36

CPC classification number: H01L23/562 ,  H01L23/10 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/36 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2224/0401

Abstract: PROBLEM TO BE SOLVED: To reduce a stress, in particular, generated in a material inside a laminate coupled to a circuit card by bending of the circuit card, as to electronic structure and a forming method related thereto. SOLUTION: The laminate is coupled to an electron carrier by soldering. A stiffener is attached to one portion of a surface in the laminate by a stiffener adhesive using an adhesive, and the stiffener adhesive contacts physically with one portion of the first surface of the stiffener, and the portion of the surface in the laminate, by the adhesive. A thermal lid is attached to one portion of the second surface in the stiffener by a lid adhesive using the adhesive, and the lid adhesive contacts physically with one portion of a surface in the lid and one portion of the second surface of the stiffener. A void area is arranged between the surface in the thermal lid and the surface in the laminate. COPYRIGHT: (C)2004,JPO

公开(公告)号：DE10120868A1

公开(公告)日：2001-12-20

申请号：DE10120868

申请日：2001-04-27

Applicant: IBM

Inventor： ALCOE DAVID J ,  DOWNES FRANCIS J ,  JONES GERALD W ,  KRESGE JOHN S ,  TYTRAN-PALOMAKI CHERYL L

IPC: H01L23/498 ,  H05K3/46 ,  H05K3/42

Abstract: Connecting structure comprises a support material (100), a metallic through-hole arranged in the carrier material; a re-distributing layer on a first an a second surface of the carrier material; and a through-contact within the re-distributing layer and selectively arranged above the through-hole and electrically connected to it. Preferred Features: The support material comprises: a base surface (112); a first dielectric material layer (114); a first pair of first signal surfaces (116); a second dielectric material layer (118); a first pair of conducting surfaces (120); a third dielectric material layer (122); a second pair of second signal surfaces (124); a fourth dielectric material layer (126); and a second pair of second conducting surfaces (128). The base surface is a layer of copper-invar-copper. The first and second signal surfaces are impedance-controlled switching circuit layers.

公开(公告)号：JP2006270108A

公开(公告)日：2006-10-05

申请号：JP2006101006

申请日：2006-03-31

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ALCOE DAVID J ,  BLACKWELL KIM J ,  JADHAV VIRENDRA R

IPC: B42D15/10 ,  H01L23/12 ,  G06K19/077 ,  H01L23/00 ,  H01L23/10 ,  H01L23/16 ,  H01L23/31 ,  H01L23/36

CPC classification number: H01L23/562 ,  H01L23/10 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/36 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2224/0401

Abstract: PROBLEM TO BE SOLVED: To provide a stiffener for reducing stress, in particular, generated in a material in a laminate coupled to a circuit card by bending the circuit card, as to electronic structure and a forming method related thereto. SOLUTION: The laminate 20 is coupled to an electron carrier 30 by soldering. The stiffener 15 is attached to one portion of a surface in the laminate 20 with a stiffener adhesive 16 using an adhesive, and the stiffener adhesive 16 contacts physically with one portion of the first surface 11 of the stiffener 15, and the portion of the surface in the laminate 20 with the adhesive. A thermal lid 28 is attached to one portion of the second surface 32 in the stiffener 15 with a lid adhesive 27 using the adhesive, and the lid adhesive 27 contacts physically with one portion of a surface 35 in the lid and one portion of the second surface 32 of the stiffener 20 with the adhesive. A void area is arranged between the surface 35 in the thermal lid 28 and the surface in the laminate 20. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于减小应力的加强件，特别是通过弯曲电路卡而与电路卡连接的层压材料中产生的电子结构和与其相关的成形方法。 解决方案：层压体20通过焊接与电子载体30耦合。 加强件15使用粘合剂与加强件粘合剂16连接在层压体20中的表面的一部分上，并且加强件粘合剂16物理地与加强件15的第一表面11的一部分接触，并且表面的部分 在具有粘合剂的层压体20中。 热盖28通过使用粘合剂的盖粘合剂27附接在加强件15中的第二表面32的一部分上，并且盖粘合剂27物理地与盖中的表面35的一部分接触，并且第二部分的一部分 具有粘合剂的加强件20的表面32。 在热盖28中的表面35和层压体20中的表面之间布置有空隙区域。（C）2007年，JPO和INPIT

公开(公告)号：JP2004289150A

公开(公告)日：2004-10-14

申请号：JP2004075099

申请日：2004-03-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ALCOE DAVID J ,  INFANTOLINO WILLIAM ,  JADHAV VIRENDRA R

IPC: H01L23/32 ,  H01L23/498 ,  H05K1/11 ,  H05K3/34 ,  H05K3/46

CPC classification number: H01L23/49838 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/15312 ,  H01L2924/16195 ,  H05K1/113 ,  H05K1/114 ,  H05K1/115 ,  H05K1/116 ,  H05K3/3426 ,  H05K3/4602 ,  H05K2201/09454 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/0979 ,  H05K2201/10318 ,  Y10T29/49149 ,  H01L2224/0401

Abstract: PROBLEM TO BE SOLVED: To provide an electronic package, such as a chip carrier, with an optimized circuit pattern, which has a circuitized substrate on which first and second circuit patterns are formed. SOLUTION: The circuitized substrate includes a corner surface region. A second circuit pattern is electrically connected to a first circuit pattern on the corner surface region of the circuitized substrate and is positioned, in such a manner that cracks in the first circuit pattern are substantially inhibited during flexure of the chip carrier. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2004056126A

公开(公告)日：2004-02-19

申请号：JP2003181880

申请日：2003-06-25

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ALCOE DAVID J ,  BRODSKY WILLIAM L ,  CALMIDI VARAPRASAD V ,  SATHE SANJEEV B ,  STUTZMAN RANDALL J

IPC: H05K7/20 ,  H01L23/10 ,  H01L23/36 ,  H01L23/40 ,  H01L23/42 ,  H01L23/427 ,  H01L23/34 ,  H01L23/373 ,  H01L25/07 ,  H01L25/18

CPC classification number: H01L23/10 ,  H01L23/36 ,  H01L23/42 ,  H01L23/427 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide an electronic package which has at least one element and can dissipate heat efficiently.
SOLUTION: This electronic package comprises: a substrate 102 with a first thermal expansion coefficient; a lid 130 with a second thermal expansion coefficient (the first thermal expansion coefficient matches the second thermal expansion coefficient) which is attached to the substrate and has a vapor chamber 160; a thermal transfer medium in contact with the rear surface of each component and the outer surface of the lower wall of the lid; and each component electrically connected to the top surface of the substrate. Thus, efficient cooling can be obtained by means of the vapor chamber while minimizing stress which is induced by thermal expansion coefficient mismatch and applied to the package.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2002237553A

公开(公告)日：2002-08-23

申请号：JP2001332261

申请日：2001-10-30

Applicant: IBM

Inventor： ALCOE DAVID J

IPC: H01R11/01 ,  H01L23/00 ,  H01L23/12 ,  H01L23/32 ,  H01L23/498 ,  H05K1/00 ,  H05K1/02 ,  H05K1/05 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H05K3/36 ,  H05K7/20

Abstract: PROBLEM TO BE SOLVED: To provide reliable connection for reducing stress caused by heat in BGA connection or in chip package, and to provide an electronic device. SOLUTION: The flexible connector is a laminated connector which is compliant with respect to stress and having a plurality of contacts on a first face and a second face thereof. When a selection contact of the first face is dislocated from the selection contact of the second face of the connector, influence due to mismatch of CTE between the chip package and a printed circuit card is reduced to a minimum, and as a result. Then, generation of fatigue in solar ball is limited to a minimum.

公开(公告)号：HK1040569A1

公开(公告)日：2002-06-14

申请号：HK02101938

申请日：2002-03-13

Applicant: IBM

Inventor： ALCOE DAVID J ,  DOWNES FRANCIS J JR ,  JONES GERALD W ,  KRESGE JOHN S ,  TYTRAN-PALOMAKI CHERYL L

IPC: H01L23/498 ,  H05K3/46 ,  H01L ,  H05K

Abstract: A semiconductor chip carrier having an increased chip connector and plated through hole density. In particular, a substrate having a plurality of plated through holes therein, and a fatigue resistant redistribution layer thereon. The redistribution layer includes a plurality of vias selectively positioned over and contacting the plated through holes. The substrate further including a ground plane, two pair of signal planes, and two pair of power planes, wherein the second pair of power planes are located directly underneath the external dielectric layer. A buried plated through hole within the substrate.