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公开(公告)号:JP2000294686A
公开(公告)日:2000-10-20
申请号:JP2000065422
申请日:2000-03-09
Applicant: IBM
Inventor: JOHNSON ERIC A , KRESGE JOHN S
IPC: H01L23/28 , H01L23/12 , H01L23/32 , H01L23/498 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/00 , H05K3/34
Abstract: PROBLEM TO BE SOLVED: To reduce strain induced by the heat of the solder ball of a ball grid array module attached to a circuit card by a vacant part substantially surrounding the second section of a dielectric layer, and a pad containing the step positioned above the second section. SOLUTION: A solder ball 48 is attached to a circuit card bad 54, and a BGA module 40 is connected to a circuit card 50. A circular vacant space 43 of height ΔH1 inside a board 42 surrounds board material under the GBA pad 44, and a circular vacant space 56 of height ΔH2 inside a board 52 surrounds board material under a circuit card pad 54. The transformation of heat-induced strain is dispersed to the height H+ΔH1+ΔH2, whereby the strain of the solder ball decreases. This protects the preservability of solder connection, and extends the fatigue life of the BGA module, and further it can be used together with other method with a slight additional cost.
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公开(公告)号:GB2349014B
公开(公告)日:2003-10-22
申请号:GB0004103
申请日:2000-02-23
Applicant: IBM
Inventor: JOHNSON ERIC A , KRESGE JOHN S
IPC: H01L23/28 , H01L23/12 , H01L23/32 , H01L23/498 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/00 , H05K3/34 , H01L23/485
Abstract: A method and structure for reducing thermally induced strains on the solder joints that couple a ball grid array (BGA) module to a circuit card, so as to improve the fatigue life of the BGA module. The thermally induced strains arise from a mismatch in thermal expansion coefficient between the dielectric substrate of the BGA module and the dielectric board of the circuit card. The method generates void annular regions around portions of the BGA dielectric substrate to which the BGA solder balls are to be attached and/or around portions of the circuit card dielectric material to which the BGA module is to be attached. This results in the formation of dielectric islands or peninsulas that bound the solder balls of the BGA module after installation on the circuit card. The dielectric islands or peninsulas thus formed serve to increase the effective height over which the differential expansion is accommodated, thereby reducing the strains throughout the solder joints. Additionally, the void annular regions provide space for the deformation of the dielectric islands or peninsulas, thereby increasing their compliance and transferring strain from the solder joints to the dielectric islands or peninsulas.
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公开(公告)号:GB2349014A
公开(公告)日:2000-10-18
申请号:GB0004103
申请日:2000-02-23
Applicant: IBM
Inventor: JOHNSON ERIC A , KRESGE JOHN S
IPC: H01L23/28 , H01L23/12 , H01L23/32 , H01L23/498 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/00 , H05K3/34 , H01L23/485
Abstract: A method for forming an electronic structure comprises removing a portion of a dielectric layer from a substrate 52 to form a void 56. The void portion 56 may completely or partly surround a second portion 57 of the dielectric layer. A conductive pad 54 is formed on the second portion 57 of dielectric. The void may be formed using a laser. The method and structure may be used to reduce thermally induced strains on solder joints 48 that couple a ball grid array (BGA) module 40 to a circuit card 50.
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公开(公告)号:CA2045227A1
公开(公告)日:1992-03-10
申请号:CA2045227
申请日:1991-06-21
Applicant: IBM
Inventor: ANSCHEL MORRIS , BARBOSA JOSE A , DIBBLE ERIC P , FUNARI JOSEPH , KRESGE JOHN S , LAMB CHARLES R , MURPHY RICHARD G , REYNOLDS SCOTT D , SAMMAKIA BAHGAT G , SHOLTES TAMAR A , STORR WAYNE R JR
IPC: H01L23/36 , H01L23/538 , H01L25/065 , H01L25/07 , H01L25/18 , H05K1/18
Abstract: HIGH MEMORY DENSITY PACKAGE Disclosed is a high density microelectronic circuit package. The circuit package includes a plurality of IC chips, as memory chips, on a circuitized flexible tape, which is, in turn, bonded to a printed circuit board. The circuitized flexible tape extends outwardly from the printed circuit board and has a plurality of IC chips mounted on I/O pads on the tape. The individual IC chips are in thermal contact with a heat sink means on the surfaces thereof opposite the circuitized flexible tape. The circuitized flexible tape and the heat sink are bonded to a printed circuit board.
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公开(公告)号:CA2291402C
公开(公告)日:2004-11-16
申请号:CA2291402
申请日:1999-12-02
Applicant: IBM
Inventor: JOHNSON ERIC A , KRESGE JOHN S
IPC: H01L23/28 , H01L23/12 , H01L23/32 , H01L23/498 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/00 , H05K3/34 , H05K3/22
Abstract: A method and structure for reducing thermally induced strains on the solder joints that couple a ball grid array (BGA) module to a circuit card, so as to improve the fatig ue life of the BGA module. The thermally induced strains arise from a mismatch in thermal expansion coefficient between the dielectric substrate of the BGA module and the dielectric board of the circuit card. The method generates void annular regions around portions of the BGA dielectric substrate to which the BGA solder balls are to be attached and/or around portions of the circuit ca rd dielectric material to which the BGA module is to be attached. This results in the formation of dielectric islands or peninsulas that bound the solder balls of the BGA module after installation on the circuit card. The dielectric islands or peninsulas thus formed serve to increase the effective height over which the differential expansion is accommodated, thereby reducing the strains throughout the solder joints. Additionally, the void annular regions provide space for the deformation of the dielectric islands or peninsulas, thereby increasing their compliance and transferring strain from the solder joints to the dielectric islands or peninsulas.
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公开(公告)号:DE10120868A1
公开(公告)日:2001-12-20
申请号:DE10120868
申请日:2001-04-27
Applicant: IBM
Inventor: ALCOE DAVID J , DOWNES FRANCIS J , JONES GERALD W , KRESGE JOHN S , TYTRAN-PALOMAKI CHERYL L
IPC: H01L23/498 , H05K3/46 , H05K3/42
Abstract: Connecting structure comprises a support material (100), a metallic through-hole arranged in the carrier material; a re-distributing layer on a first an a second surface of the carrier material; and a through-contact within the re-distributing layer and selectively arranged above the through-hole and electrically connected to it. Preferred Features: The support material comprises: a base surface (112); a first dielectric material layer (114); a first pair of first signal surfaces (116); a second dielectric material layer (118); a first pair of conducting surfaces (120); a third dielectric material layer (122); a second pair of second signal surfaces (124); a fourth dielectric material layer (126); and a second pair of second conducting surfaces (128). The base surface is a layer of copper-invar-copper. The first and second signal surfaces are impedance-controlled switching circuit layers.
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公开(公告)号:HK1031041A1
公开(公告)日:2001-05-25
申请号:HK01101927
申请日:2001-03-16
Applicant: IBM
Inventor: JOHNSON ERIC A , KRESGE JOHN S
IPC: H01L23/28 , H01L23/12 , H01L23/32 , H01L23/498 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/00 , H05K3/34 , H01L
Abstract: A method and structure for reducing thermally induced strains on the solder joints that couple a ball grid array (BGA) module to a circuit card, so as to improve the fatigue life of the BGA module. The thermally induced strains arise from a mismatch in thermal expansion coefficient between the dielectric substrate of the BGA module and the dielectric board of the circuit card. The method generates void annular regions around portions of the BGA dielectric substrate to which the BGA solder balls are to be attached and/or around portions of the circuit card dielectric material to which the BGA module is to be attached. This results in the formation of dielectric islands or peninsulas that bound the solder balls of the BGA module after installation on the circuit card. The dielectric islands or peninsulas thus formed serve to increase the effective height over which the differential expansion is accommodated, thereby reducing the strains throughout the solder joints. Additionally, the void annular regions provide space for the deformation of the dielectric islands or peninsulas, thereby increasing their compliance and transferring strain from the solder joints to the dielectric islands or peninsulas.
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公开(公告)号:MY117209A
公开(公告)日:2004-05-31
申请号:MYPI20000780
申请日:2000-02-29
Applicant: IBM
Inventor: JOHNSON ERIC A , KRESGE JOHN S
IPC: H01L23/28 , H05K1/11 , H01L23/12 , H01L23/32 , H01L23/498 , H05K1/02 , H05K1/18 , H05K3/00 , H05K3/34 , H05K7/00
Abstract: A METHOD AND STRUCTURE FOR REDUCING THERMALLY INDUCED STRAINS ON THE SOLDER JOINTS THAT COUPLE A BALL GRID ARRAY (BGA) MODULE TO A CIRCUIT CARD, SO AS 10 IMPROVE THE FATIGUE LIFE OF THE BGA MODULE. THE THERMALY INDUCED STRAINS ARISE FROM A MISMATCH IN THERMAL EXPANSION COEFFICIENT BETWEEN THE DIELECTRIC SUBSTRATE OF THE BGA MODULE AND THE DIELECTRIC BOARD OF THE CIRCUIT CARD. THE METHOD GENERATES VOID ANNULAR REGIONS AROUND PORTION OF THE BGA DIELECTRIC SUBSTRATE TO WHICH THE BGA SOLDER BALLS ARE TO BE ATTACHED AND/OR AROUND OF THE CIRCUIT CARD DIELECTRIC MATERIAL TO WHICH THE BGA MODULE IS TO BE ATTACHED. THIS RESULTS IN THE FORMATION OF DIELECTRIC ISLANDS OR PENINSULAS THAT BOUND THE SOLDER BALLS OF THE BGA MODULE AFTER INSTALLATION ON THE CIRCUIT CARD. THE DIELECTRIC ISLANDS OR PENINSULAS THUS FORMED SERVE TO INCREASE THE EFFECTIVE HEIGHT OVER WHICH THE DIFFERENTIAL EXPANSION IS ACCOMMODATED, THEREBY REDUCING THE STRAINS THOUGHOUT THE SOLDER JOINTS. ADDITIONALLY, THE VOID ANNULAR REGIONS PROVIDE SPACE FOR THE DEFORMATION OF THE DIELECTRIC ISLANDS OR PENINSULAS, THEREBY INCREASING THEIR COMPLIANCE AND TRANSFERRING STRAINS FROM THE SOLDER JOINTS TO THE DIELECTRIC ISLAND OR PENINSULAS.
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公开(公告)号:HK1040569A1
公开(公告)日:2002-06-14
申请号:HK02101938
申请日:2002-03-13
Applicant: IBM
Inventor: ALCOE DAVID J , DOWNES FRANCIS J JR , JONES GERALD W , KRESGE JOHN S , TYTRAN-PALOMAKI CHERYL L
IPC: H01L23/498 , H05K3/46 , H01L , H05K
Abstract: A semiconductor chip carrier having an increased chip connector and plated through hole density. In particular, a substrate having a plurality of plated through holes therein, and a fatigue resistant redistribution layer thereon. The redistribution layer includes a plurality of vias selectively positioned over and contacting the plated through holes. The substrate further including a ground plane, two pair of signal planes, and two pair of power planes, wherein the second pair of power planes are located directly underneath the external dielectric layer. A buried plated through hole within the substrate.
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公开(公告)号:CA2291402A1
公开(公告)日:2000-09-19
申请号:CA2291402
申请日:1999-12-02
Applicant: IBM
Inventor: JOHNSON ERIC A , KRESGE JOHN S
IPC: H01L23/28 , H01L23/12 , H01L23/32 , H01L23/498 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/00 , H05K3/34 , H05K3/22
Abstract: A method and structure for reducing thermally induced strains on the solder joints that couple a ball grid array (BGA) module to a circuit card, so as to improve the fatigue life of the BGA module. The thermally induced strains arise from a mismatch in thermal expansion coefficient between the dielectric substrate of the BGA module and the dielectric board of the circuit card. The method generates void annular regions around portions of the BGA dielectric substrate to which the BGA solder balls are to be attached and/or around portions of the circuit card dielectric material to which the BGA module is to be attached. This results in the formation of dielectric islands or peninsulas that bound the solder balls of the BGA module after installation on the circuit card. The dielectric islands or peninsulas thus formed serve to increase the effective height over which the differential expansion is accommodated, thereby reducing the strains throughout the solder joints. Additionally, the void annular regions provide space for the deformation of the dielectric islands or peninsulas, thereby increasing their compliance and transferring strain from the solder joints to the dielectric islands or peninsulas.
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