公开(公告)号：DE2250198A1

公开(公告)日：1973-05-17

申请号：DE2250198

申请日：1972-10-13

Applicant: IBM

Inventor： ARNETT PATRICK CLINTON ,  STAPPER CHARLES HENRI

IPC: G11C27/04 ,  H01L21/339 ,  H01L29/10 ,  H01L29/762 ,  H01L29/768 ,  G11C11/34

公开(公告)号：DE2624157A1

公开(公告)日：1977-02-03

申请号：DE2624157

申请日：1976-05-29

Applicant: IBM

Inventor： ARNETT PATRICK CLINTON ,  CHANG JOSEPH JUIFU

IPC: H01L21/8247 ,  G11C16/04 ,  H01L27/102 ,  H01L29/788 ,  H01L29/792 ,  H01L29/94 ,  G11C11/40 ,  G11C7/00 ,  H01L27/04

Abstract: An extremely high density memory array in which every intersection between two insulated orthogonal sets of drive lines define a nonvolatile memory device is described. Each device utilizes the area directly under the intersection of sets of lines to selectively store charges therein under control of suitable writing pulses. Reading is accomplished utilizing capacitive coupling through the device. The array comprises insulated metallic word lines orthogonal to doped bit lines defined within the surface of a semiconductor body. The insulation between the word lines and the bit lines has a dual charge state and is capable of storing charges. A unique structure is utilized whereby a highly doped layer is formed at the surface of the semiconductor body and of the same conductivity type as the body. The bit lines are composed of two distinct layers of an opposite conductivity type to that of said body wherein the layer closest to the surface is less highly doped. The selective biasing of word and bit lines causes charges to be injected into the insulation immediately between the two lines which injected charges alter the capacitance characteristics of the device and thus the signal coupling characteristic between the word and bit lines. During the write operation, an avalanche breakdown at the junction is caused to occur by heavily biasing the junction, and charge carriers are injected into the overlying insulator. The charge carriers so injected remain localized in the insulator immediately between the two lines with negligible fringing into the region outside this intersection and thus do not disturb the information on adjacent bit lines which allows extremely close placement of such adjacent lines. To erase, a voltage is supplied to cause the injected carriers to be driven out of the insulation back into the substrate. As stated previously, the reading operation utilizes the change in the coupling capacitance with a charge stored in the device and comprises introducing a signal on one line well below the breakdown voltage of the device so that the stored charge is in no way affected by any number of reading operations and detecting said signal on the other line, if coupled through.

公开(公告)号：DE2250140A1

公开(公告)日：1973-05-17

申请号：DE2250140

申请日：1972-10-13

Applicant: IBM

Inventor： ARNETT PATRICK CLINTON ,  HELLER LAWRENCE GRIFFITH ,  STAPPER CHARLES HENRI

IPC: G11C27/04 ,  H01L21/339 ,  H01L29/423 ,  H01L29/43 ,  H01L29/762 ,  H01L29/768 ,  G11C11/34

Abstract: 1383977 Semi-conductor devices INTERNATIONAL BUSINESS MACHINES CORP 18 Oct 1972 [10 Nov 1971] 47952/72 Heading H1K In a semi-conductor device, such as a shift register or delay line, utilizing the drift of an injected group 30 of minority-charge carriers through a depletion region 23À1 induced in a substrate 10À1 beneath an electrode structure 20À1, there is provided a graded-impurityconcentration region 17À1 of the same conductivity type as the substrate 10À1. The region 17À1 is graded in such a way that in the presence of the appropriate operating voltages on the substrate electrode 21À1, electrode structure 20À1, injecting electrode 15À1 and detecting electrode 16À1. The boundary of the depletion region 23À1 extends parallel to the device surface. In the Si shift register illustrated the electrode structure 20À1 comprises a plurality of interconnected A1 strips capacitively coupled to the ion implanted region 17À1 through a SiO2 layer 18À1. For P-type material a negative bias on the substrate electrode 21À1 induces the depletion region 23À1, the presence of the grounded strips 20À1 producing shallow potential wells 25 which are rapidly filled with injected charge-carriers. A subsequently injected charge-carrier group 30 will drift along the depletion region 23À1, but will tend to become progressively loss spatially localized due to space charge spreading. The group 30 is periodically reshaped by the application of a positive clock pulse to the electrode structure 20À1. Such a pulse temporarily deepens the potential walls 25, causing the drifting group 30 to be trapped and hence relocalized. Using this techique charge-carrier groups may be directed around carriers and in opposed directions. In a simplified embodiment constituting a delay line the electrode structure 20À1 is replaced by a single continuous electrode (20), Fig. 1 (not shown), overlying the whole length of the graded region (17À1), there being in this case no localized potential walls to reshape an injected pulse.

公开(公告)号：DE69021284T2

公开(公告)日：1996-04-18

申请号：DE69021284

申请日：1990-05-21

Applicant: IBM

Inventor： ARNETT PATRICK CLINTON ,  BRYANT ANDRES ,  FOSTER JOHN STUART ,  FROMMER JANE ELIZABETH ,  IWATA JON ASAO CARY

IPC: G01Q60/00 ,  G03F1/00 ,  G03F7/20 ,  H01J37/317 ,  H01L21/027 ,  H01L21/30

Abstract: A high resolution lithographic mask having a desired pattern is generated and used to replicate the pattern onto a film in a one-step process. A film of phase-changeable material in one state is provided on a conductive substrate. By scanning tunneling microscope techniques, the state and thereby the conductivity or other property of the material in selected areas (a min -c min ) of the film is changed to a second state to provide from the film a mask (19) having a desired pattern defined by crystalline areas. Amorphous material need not be removed from the mask. To replicate the pattern on another film (16), the latter is placed on another conductive substrate (17); the mask is positioned (21p-21r) with its patterned side within electron tunneling distance (19p-19r) of said other film; and the pattern is replicated in a single step by applying a voltage between the mask and other film. The voltage charge on said mask is positive and negative on said other film to cause current to flow in the crystalline areas of said mask and, by electron flow from said film to the mask, eliminate backscattering and insure high resolution. As the state changes (e.g., from crystalline to amorphous) in the pattern areas of said other film, conductivity in the crystalline areas will progressively decrease and, by causing a corresponding reduction in current flow in the crystalline areas, minimize the risk of undesired broadening of exposed areas of said other film.

公开(公告)号：DE69021284D1

公开(公告)日：1995-09-07

申请号：DE69021284

申请日：1990-05-21

Applicant: IBM

Inventor： ARNETT PATRICK CLINTON ,  BRYANT ANDRES ,  FOSTER JOHN STUART ,  FROMMER JANE ELIZABETH ,  IWATA JON ASAO CARY

IPC: G01Q60/00 ,  G03F1/00 ,  G03F7/20 ,  H01J37/317 ,  H01L21/027 ,  H01L21/30

Abstract: A high resolution lithographic mask having a desired pattern is generated and used to replicate the pattern onto a film in a one-step process. A film of phase-changeable material in one state is provided on a conductive substrate. By scanning tunneling microscope techniques, the state and thereby the conductivity or other property of the material in selected areas (a min -c min ) of the film is changed to a second state to provide from the film a mask (19) having a desired pattern defined by crystalline areas. Amorphous material need not be removed from the mask. To replicate the pattern on another film (16), the latter is placed on another conductive substrate (17); the mask is positioned (21p-21r) with its patterned side within electron tunneling distance (19p-19r) of said other film; and the pattern is replicated in a single step by applying a voltage between the mask and other film. The voltage charge on said mask is positive and negative on said other film to cause current to flow in the crystalline areas of said mask and, by electron flow from said film to the mask, eliminate backscattering and insure high resolution. As the state changes (e.g., from crystalline to amorphous) in the pattern areas of said other film, conductivity in the crystalline areas will progressively decrease and, by causing a corresponding reduction in current flow in the crystalline areas, minimize the risk of undesired broadening of exposed areas of said other film.