公开(公告)号：AT394794T

公开(公告)日：2008-05-15

申请号：AT00914903

申请日：2000-03-11

Applicant: IBM

Inventor： CHU JACK

IPC: H01L29/161 ,  H01L29/778 ,  H01L21/20 ,  H01L21/205 ,  H01L21/338 ,  H01L21/8232 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L27/095 ,  H01L29/78 ,  H01L29/786 ,  H01L29/812

Abstract: A method and a layered heterostructure for forming high mobility Ge channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate, and a channel structure of a compressively strained epitaxial Ge layer having a higher barrier or a deeper confining quantum well and having extremely high hole mobility for complementary MODFETs and MOSFETs. The invention overcomes the problem of a limited hole mobility due to alloy scattering for a p-channel device with only a single compressively strained SiGe channel layer. This invention further provides improvements in mobility and transconductance over deep submicron state-of-the art Si pMOSFETs in addition to having a broad temperature operation regime from above room temperature (425 K) down to cryogenic low temperatures (0.4 K) where at low temperatures even high device performances are achievable.

公开(公告)号：AT464654T

公开(公告)日：2010-04-15

申请号：AT01972244

申请日：2001-09-27

Applicant: IBM

Inventor： CANAPERI DONALD ,  CHU JACK ,  D EMIC CHRISTOPHER ,  HUANG LIJUAN ,  OTT JOHN ,  WONG HON-SUM

IPC: H01L21/762 ,  H01L21/02 ,  H01L21/20 ,  H01L21/336 ,  H01L21/338 ,  H01L21/76 ,  H01L27/12 ,  H01L29/778 ,  H01L29/786 ,  H01L29/812

Abstract: A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, implanting hydrogen into a selected Si1-yGey layer to form a hydrogen-rich defective layer, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and separating two substrates at the hydrogen-rich defective layer. The separated substrates may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1-yGey, and strained Si1-yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1-yGeyC.

公开(公告)号：AT364903T

公开(公告)日：2007-07-15

申请号：AT05723468

申请日：2005-02-22

Applicant: IBM

Inventor： CHU JACK ,  DEHLINGER GABRIEL ,  GRILL ALFRED ,  KOESTER STEVEN ,  OUYANG QIGING ,  SCHAUB JEREMY

IPC: H01L31/101

Abstract: The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.