DECOUPLING OF MULTILAYER CERAMIC SUBSTRATE

    公开(公告)号:JP2000101012A

    公开(公告)日:2000-04-07

    申请号:JP21489799

    申请日:1999-07-29

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a reformed-type structure which raises the effect of a decoupling capacitor by reducing the influence of the inductance concerned with the decoupling capacitor. SOLUTION: A multilayer ceramic module includes a multilayer ceramic substrate 20 having upside and downside, at least one semiconductor chip 25 attached to the upside of the substrate, a plurality of module pins 23 projected from the downside of the substrate, and at least one decoupling capacitor 21 attached to the substrate between adjacent module pins under the substrate.

    SEMICONDUCTOR FABRICATION METHOD FOR IMPROVED DEVICE YIELD

    公开(公告)号:CA1090005A

    公开(公告)日:1980-11-18

    申请号:CA281576

    申请日:1977-06-28

    Applicant: IBM

    Abstract: SEMICONDUCTOR FABRICATION METHOD FOR IMPROVED DEVICE YIELD A method for fabricating bipolar semiconductor devices of large scale integration in which the formation of pipes, which result in shorts or leakages between two conductivity types of the semiconductor devices, is minimized. Prior to forming the emitters in the bipolar transistors, nucleation sites for crystallographic defects such as dislocation loops are formed in the base region near its surface. The emitters are then formed in base regions containing the nucleation sites and the sites are converted into electrically harmless dislocation loops during diffusion of the emitter impurity. Preferably, the nucleation sites are formed by implanting non-doping impurities, such as helium, neon, argon, krypton, xenon, silicon, and oxygen.

    3.
    发明专利
    未知

    公开(公告)号:DE2728985A1

    公开(公告)日:1978-01-05

    申请号:DE2728985

    申请日:1977-06-28

    Applicant: IBM

    Abstract: A method for fabricating bipolar semiconductor devices of large scale integration in which the formation of pipes, which result in shorts or leakages between two conductivity types of the semiconductor devices, is minimized. Prior to forming the emitters in the bipolar transistors, nucleation sites for crystallographic defects such as dislocation loops are formed in the base region near its surface. The emitters are then formed in base regions containing the nucleation sites and the sites are converted into electrically harmless dislocation loops during diffusion of the emitter impurity. Preferably, the nucleation sites are formed by implanting non-doping impurities, such as helium, neon, argon, krypton, xenon, silicon, and oxygen.

    6.
    发明专利
    未知

    公开(公告)号:FR2357065A1

    公开(公告)日:1978-01-27

    申请号:FR7717613

    申请日:1977-06-02

    Applicant: IBM

    Abstract: A method for fabricating bipolar semiconductor devices of large scale integration in which the formation of pipes, which result in shorts or leakages between two conductivity types of the semiconductor devices, is minimized. Prior to forming the emitters in the bipolar transistors, nucleation sites for crystallographic defects such as dislocation loops are formed in the base region near its surface. The emitters are then formed in base regions containing the nucleation sites and the sites are converted into electrically harmless dislocation loops during diffusion of the emitter impurity. Preferably, the nucleation sites are formed by implanting non-doping impurities, such as helium, neon, argon, krypton, xenon, silicon, and oxygen.

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