公开(公告)号：CA2080601C

公开(公告)日：1995-02-14

申请号：CA2080601

申请日：1990-10-10

Applicant: IBM

Inventor： GROBMAN WARREN D ,  KRAUS CHARLES J ,  STOLLER HERBERT I ,  WU LEON L-H

IPC: H01L23/538 ,  H01L23/525 ,  H01L21/48

Abstract: An electronics system and method are provided which allow engineering changes to be made to a substrate without requiring the addition of fly wires and without requiring relatively large areas of pads for attaching these wires. Each device site is surrounded by a series of engineering change ring patterns (43, 44, 45). A series of engineering change patterns allow change interconnections between device sites to be made. Fan-in metallizations (60) extend inwardly to the device sites from these change patterns, with a series of vias (63, 69) making surface connections adjacent to the ring patterns. Fan-out metallizations (126) extend from the device site pads to the ring patterns, with a series of vias (210) making surface connections adjacent to the ring patterns. Engineering changes are made by directly writing surface metal deposits to make the appropriate connections between the vias and the ring pattern. The original chip pad connections (28, 29) and the new ring pattern (43) connections can be appropriately isolated by laser deletions, if necessary.

公开(公告)号：CA1286791C

公开(公告)日：1991-07-23

申请号：CA589395

申请日：1989-01-27

Applicant: IBM

Inventor： BOSS DAVID W ,  CARR TIMOTHY W ,  DUBETSKY DERRY J ,  GREENSTEIN GEORGE M ,  GROBMAN WARREN D ,  HAYUNGA CARL P ,  KUMAR ANANDA H ,  LANGE WALTER F ,  MASSEY ROBERT H ,  PALMATEER PAUL H ,  ROMANO JOHN A ,  SHIH DA-YUAN

IPC: H05K9/00 ,  H01L23/498 ,  H05K3/46 ,  H01L23/485

Abstract: Sealing and stress relief are provided to a low-fracture strength glass-ceramic substrate. Hermeticity is addressed through the use of capture pads in alignment with vias and through polymeric overlayers with interconnection between the underlying via or pad metallurgy and the device, chip, wire or pin bonded to the surface of the layer. Multilevel structures are taught along with a self-aligned sealing and wiring process.