MULTI-LEVEL COFACE INTERCONNECTING STRUCTURE

    公开(公告)号:JP2001284454A

    公开(公告)日:2001-10-12

    申请号:JP2001047144

    申请日:2001-02-22

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To improve a rigidity of a backend-of-line structure. SOLUTION: The damascene structure of interconnecting multi-level coppers on an integrated circuit chip includes several line conductors which are on the integrated circuit and are separated by dielectric materials having quite low dielectric constant and high elastic modulus. A second flat interconnection layer 18 on the first flat interconnection layer 14, consists of a dielectric film 26 having a higher elastic modulus than that of a dielectric material in the first flat interconnection layer 14, and an electrical conduction via 28 passing through the dielectric film 26. Electrical conduction vias 28 contact line conductors 22 selectively. A third flat interconnection layer 20 on the second flat interconnection layer 18, has several line conductors 22 which are isolated by dielectric materials and contact electrical conduction vias selectively.

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    发明专利
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    公开(公告)号:AT333144T

    公开(公告)日:2006-08-15

    申请号:AT02721047

    申请日:2002-02-19

    Applicant: IBM

    Abstract: A substantially defect-free, low-k dielectric film having improved adhesion is provided by (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate so as to provide a substantially uniform coating of said silane-coupling agent on said substrate; (b) heating the substrate containing the coating of the silane-coupling agent at a temperature of about 90° C. or above so as to provide a surface containing Si-O bonds; (c) rinsing the heated substrate with a suitable solvent that is effective in removing any residual silane-coupling agent; and (d) applying a dielectric material to the rinsed surface containing the Si-O bonds.

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