Abstract:
PROBLEM TO BE SOLVED: To improve a rigidity of a backend-of-line structure. SOLUTION: The damascene structure of interconnecting multi-level coppers on an integrated circuit chip includes several line conductors which are on the integrated circuit and are separated by dielectric materials having quite low dielectric constant and high elastic modulus. A second flat interconnection layer 18 on the first flat interconnection layer 14, consists of a dielectric film 26 having a higher elastic modulus than that of a dielectric material in the first flat interconnection layer 14, and an electrical conduction via 28 passing through the dielectric film 26. Electrical conduction vias 28 contact line conductors 22 selectively. A third flat interconnection layer 20 on the second flat interconnection layer 18, has several line conductors 22 which are isolated by dielectric materials and contact electrical conduction vias selectively.
Abstract:
A substantially defect-free, low-k dielectric film having improved adhesion is provided by (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate so as to provide a substantially uniform coating of said silane-coupling agent on said substrate; (b) heating the substrate containing the coating of the silane-coupling agent at a temperature of about 90°C or above so as to provide a surface containing Si-O bonds; (c) rinsing the heated substrate with a suitable solvent that is effective in removing any residual silane-coupling agent; and (d) applying a dielectric material to the rinsed surface containing the Si-O bonds.
Abstract:
A substantially defect-free, low-k dielectric film having improved adhesion is provided by (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate so as to provide a substantially uniform coating of said silane-coupling agent on said substrate; (b) heating the substrate containing the coating of the silane-coupling agent at a temperature of about 90° C. or above so as to provide a surface containing Si-O bonds; (c) rinsing the heated substrate with a suitable solvent that is effective in removing any residual silane-coupling agent; and (d) applying a dielectric material to the rinsed surface containing the Si-O bonds.
Abstract:
Planar layer for conductors, includes numerous connecting lines separated from each other by dielectric. This has relatively low: dielectric constant and modulus of elasticity. A planar, perforated dielectric film layer included, has a higher modulus of elasticity. One of the conductor- and the perforated layers, is located on an integrated circuit substrate, defining a first layer. The other conductor- and perforated layer is located on the first, such that perforations make selective contact with conductors of the conductor layer.
Abstract:
A substantially defect-free, low-k dielectric film having improved adhesion is provided by (a) applying a silane coupling agent containing at least one polymerizable group to a surface of a substrate so as to provide a substantially uniform coating of said silane-coupling agent on said substrate; (b) heating the substrate containing the coating of the silane-coupling agent at a temperature of about 90° C. or above so as to provide a surface containing Si-O bonds; (c) rinsing the heated substrate with a suitable solvent that is effective in removing any residual silane-coupling agent; and (d) applying a dielectric material to the rinsed surface containing the Si-O bonds.
Abstract:
Un método de fabricación de un circuito integrado que comprende las etapas de: (a) aplicar un agente de copulación de silano que con- tiene al menos un grupo polimerizable a una superficie de un substrato (10) de tal manera como para proporcionar un revestimiento sustancialmente uniforme (12) de dicho agente de copulación de silano sobre dicho substrato; (b) calentar dicho substrato que contiene dicho reves- timiento de dicho agente de copulación de silano a una tem- peratura de 90ºC o superior para proporcionar una capa superficial modificada (14) a dicho substrato que contiene enlaces Si-O; (c) enjuagar dicho substrato calentado con un disol- vente adecuado que es eficaz para separar cualquier agente de copulación de silano sin reaccionar; y (d) aplicar un material dieléctrico (16) a dicha su- perficie enjuagada que contiene dichos enlaces Si-O.