公开(公告)号：EP1620877A4

公开(公告)日：2009-12-09

申请号：EP04749753

申请日：2004-04-05

Applicant: IBM

Inventor： HEDRICK JEFFREY C ,  HUANG ELBERT E

IPC: H01L21/312 ,  H01L20060101 ,  H01L21/28 ,  H01L21/314 ,  H01L21/3205 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76832 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/3121 ,  H01L21/314 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76844 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.

公开(公告)号：EP1529310A4

公开(公告)日：2009-06-10

申请号：EP02797318

申请日：2002-12-13

Applicant: IBM

Inventor： FORNOF ANN R ,  HEDRICK JEFFREY C ,  LEE KANG-WOOK ,  MALONE KELLY ,  TYBERG CHRISTY S

IPC: H01L23/48 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76832 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/31695 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention provides an electrical interconnect structure on a substrate, includes a first porous dielectric layer with surface region from which a porogen has been removed; and an etch stop layer disposed upon the first porous dielectric layer so that the etch stop layer extends to partially fill pores in the surface region of the first porous dielectric layer from which the porogen has been removed, thus improving adhesion during subsequent processing. Another structure comprises a substrate; a plurality of porous dielectric layers disposed on the substrate; an etch stop layer disposed between a first of the dielectric layers and a second of the dielectric layers; and at least one thin, tough, non-porous dielectric layer disposed between at least one of the porous dielectric layers and the etch stop layer. Methods of forming these structures are also provided.

公开(公告)号：EP1595276A4

公开(公告)日：2012-03-28

申请号：EP04705307

申请日：2004-01-26

Applicant: IBM

Inventor： GATES STEPHEN M ,  HEDRICK JEFFREY C ,  HUANG ELBERT E ,  PFEIFFER DIRK

IPC: G03G13/06 ,  H01L20060101 ,  H01L21/00 ,  H01L21/311 ,  H01L21/312 ,  H01L21/316 ,  H01L21/44 ,  H01L23/48 ,  H05B6/64

CPC classification number: H01L21/02126 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/31144 ,  H01L21/3121 ,  H01L21/3122 ,  H01L21/3125 ,  H01L21/316 ,  Y10S430/146 ,  Y10T428/31663

公开(公告)号：EP1595275A4

公开(公告)日：2007-10-31

申请号：EP04705302

申请日：2004-01-26

Applicant: IBM

Inventor： COHEN STEPHEN A ,  GATES STEPHAN M ,  HEDRICK JEFFREY C ,  HUANG ELBERT E ,  PFEIFFER DIRK

IPC: H01L23/532 ,  H01L20060101 ,  H01L21/00 ,  H01L21/312 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L21/02282 ,  H01L21/02126 ,  H01L21/02222 ,  H01L21/3121 ,  H01L21/3122 ,  H01L21/3125 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76832 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  Y10T428/31663 ,  H01L2924/00

Abstract: The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween where the ceramic diffusion barrier has a composition, SivNwCxOyHz, where 0.1≤v≤0.9, 0≤w≤0.5, 0.01≤x≤0.9, 0≤y≤0.7, 0.01≤z≤0.8 for v+w+x+y+Z=1. The ceramic diffusion barrier acts as a diffusion barrier to metals, i.e., copper. The present invention also comprises a method for forming the inventive ceramic diffusion barrier including the steps depositing a polymeric preceramic having a composition SivNwCxOyHz, where 0.1

公开(公告)号：JP2001284454A

公开(公告)日：2001-10-12

申请号：JP2001047144

申请日：2001-02-22

Applicant: IBM

Inventor： DAVIS CHARLES R ,  EDELSTEIN DANIEL CHARLES ,  HAY JOHN C ,  HEDRICK JEFFREY C ,  JAHNES CHRISTOPHER ,  MC GAHAY VINCENT ,  NYE HENRY A

IPC: H01L21/768 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532

Abstract: PROBLEM TO BE SOLVED: To improve a rigidity of a backend-of-line structure. SOLUTION: The damascene structure of interconnecting multi-level coppers on an integrated circuit chip includes several line conductors which are on the integrated circuit and are separated by dielectric materials having quite low dielectric constant and high elastic modulus. A second flat interconnection layer 18 on the first flat interconnection layer 14, consists of a dielectric film 26 having a higher elastic modulus than that of a dielectric material in the first flat interconnection layer 14, and an electrical conduction via 28 passing through the dielectric film 26. Electrical conduction vias 28 contact line conductors 22 selectively. A third flat interconnection layer 20 on the second flat interconnection layer 18, has several line conductors 22 which are isolated by dielectric materials and contact electrical conduction vias selectively.

公开(公告)号：JPH11179725A

公开(公告)日：1999-07-06

申请号：JP5657898

申请日：1998-03-09

Applicant: IBM

Inventor： HEDRICK JEFFREY C ,  DAVID ANDREW LEWIS ,  COSTAS PAPATHOMAS ,  STEPHEN LEO TEASDALE ,  VIEHBECK ALFRED ,  STANLEY J WHITEHAIR

IPC: C08J3/03 ,  B05D7/00 ,  B29B11/16 ,  B29K105/06 ,  C08J3/075 ,  C08J5/24 ,  H05K1/03

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing printed wiring circuit boards which eliminates use of a large vol. of org. solvents. SOLUTION: High quality, in-spec prepregs are obtd. by utilization of water- based epoxy resin emulsions. These prepregs are identical to those prepd. by using conventional org. solvents and have the same level of B-stage cure and comparable rheological properties with the conventional prepregs. Laminates fabricated from these prepregs possess equivalent or improved thermal, adhesive and hydroscopic properties to the conventional prepregs.

公开(公告)号：WO2004068550A3

公开(公告)日：2005-10-27

申请号：PCT/US2004002125

申请日：2004-01-26

Applicant: IBM ,  COHEN STEPHEN A ,  GATES STEPHAN M ,  HEDRICK JEFFREY C ,  HUANG ELBERT E ,  PFEIFFER DIRK

Inventor： COHEN STEPHEN A ,  GATES STEPHAN M ,  HEDRICK JEFFREY C ,  HUANG ELBERT E ,  PFEIFFER DIRK

IPC: H01L20060101 ,  H01L21/00 ,  H01L21/312 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/48 ,  H01L23/532

CPC classification number: H01L21/02282 ,  H01L21/02126 ,  H01L21/02222 ,  H01L21/3121 ,  H01L21/3122 ,  H01L21/3125 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76832 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  Y10T428/31663 ,  H01L2924/00

Abstract: The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween where the ceramic diffusion barrier has a composition, SivNwCxOyHz, where 0.1

Abstract translation: 本发明包括在其间形成的金属，层间电介质和陶瓷扩散阻挡层的互连结构，其中陶瓷扩散阻挡层具有组成SivNwCxOyHz，其中0.1 <= v <= 0.9,0 <= w <= 0.5,0.01 < = x <= 0.9,0 <= y <= 0.7,0.01 <= z <= 0.8对于v + w + x + y + Z = 1。 陶瓷扩散阻挡层用作金属的扩散阻挡层，即铜。 本发明还包括一种用于形成本发明的陶瓷扩散阻挡层的方法，包括沉积具有组成SivNwCxOyHz的聚合物预陶瓷的步骤，其中0.1

公开(公告)号：WO2004095510A3

公开(公告)日：2006-02-02

申请号：PCT/US2004010443

申请日：2004-04-05

Applicant: IBM ,  HEDRICK JEFFREY C ,  HUANG ELBERT E

Inventor： HEDRICK JEFFREY C ,  HUANG ELBERT E

IPC: H01L20060101 ,  H01L21/28 ,  H01L21/312 ,  H01L21/314 ,  H01L21/3205 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76832 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/3121 ,  H01L21/314 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76844 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.

Abstract translation: 本文描述了具有至少一个低k​​子层和至少一个空气阻挡子层的具有低k多层介电扩散阻挡层的结构。 多层电介质扩散阻挡层是对金属的扩散屏障和空气渗透屏障。 还描述了与生成结构有关的方法和组合物。 利用这些低k多层电介质扩散阻挡层的优点是通过降低导电金属特性之间的电容并且随着多层电介质扩散阻挡层对空气不透气并防止金属扩散而增加可靠性，可以提高芯片性能。

公开(公告)号：WO2004068551A3

公开(公告)日：2005-05-26

申请号：PCT/US2004002126

申请日：2004-01-26

Applicant: IBM ,  GATES STEPHEN M ,  HEDRICK JEFFREY C ,  HUANG ELBERT E ,  PFEIFFER DIRK

Inventor： GATES STEPHEN M ,  HEDRICK JEFFREY C ,  HUANG ELBERT E ,  PFEIFFER DIRK

IPC: G03G13/06 ,  H01L20060101 ,  H01L21/00 ,  H01L21/311 ,  H01L21/312 ,  H01L21/316 ,  H01L21/44 ,  H01L23/48 ,  H05B6/64

CPC classification number: H01L21/02126 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/31144 ,  H01L21/3121 ,  H01L21/3122 ,  H01L21/3125 ,  H01L21/316 ,  Y10S430/146 ,  Y10T428/31663

Abstract: The present invention comprises a method for forming a hardmask including the steps of depositing a polymeric preceramic precursor film atop a substrate; converting the polymeric preceramic precursor film into at least one ceramic layer, where the ceramic layer has a composition of SivNWCXOyHZ where 0.1

Abstract translation: 本发明包括一种用于形成硬掩模的方法，包括以下步骤：在基底顶上沉积聚合物预陶瓷前体膜; 将聚合物陶瓷前体膜转化为至少一个陶瓷层，其中陶瓷层具有SivNWCXOyHZ的组成，其中0.1≤v≤0.9,0<= w <0.5,0.05 <= x <= 0.9,0

公开(公告)号：DE69313954T2

公开(公告)日：1998-03-26

申请号：DE69313954

申请日：1993-07-30

Applicant: IBM

Inventor： AFZALI ARDAKANI ALI ,  GOTRO JEFFREY T ,  HEDRICK JEFFREY C ,  PAPATHOMAS KONSTANTINOS ,  PATEL NIRANJAN M ,  SHAW JANE M ,  VIEHBECK ALFRED

IPC: B32B27/06 ,  C08G65/40 ,  C08G73/06 ,  C08G75/00 ,  C08G75/20 ,  C08G79/02 ,  C08G79/04 ,  C08J5/24 ,  C08L79/04 ,  C08L101/00 ,  C08L101/02 ,  C08L101/04 ,  H05K1/03

Abstract: A composition having enhanced fracture resistance comprising curable dicyanate ester resins having incorporated therein at least one thermoplastic polymer modifier which is soluble in the dicyanate ester resin. Said thermoplastic polymer undergoes an in-situ phase separation process during cure to form a microphase-separated multiphase thermoset material.