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    CARBON-GRADED LAYER FOR IMPROVED ADHESION OF LOW-K DIELECTRICS TO SILICON SUBSTRATES
    1.
    发明申请
    CARBON-GRADED LAYER FOR IMPROVED ADHESION OF LOW-K DIELECTRICS TO SILICON SUBSTRATES 审中-公开
    用于改善低介电常数硅基底粘附的碳分层

    公开(公告)号：WO03009380A3

    公开(公告)日：2003-08-07

    申请号：PCT/GB0201370

    申请日：2002-03-21

    Applicant: IBM ,  IBM UK

    Inventor： CONTI RICHARD ,  DEV PRAKASH ,  DOBUZINSKY DAVID MARK ,  EDELSTEIN DANIEL CHARLES ,  LEE GILL ,  LOW KIA-SENG ,  SHAFER PADRAIC ,  SIMPSON ALEXANDER ,  WRSCHKA PETER

    IPC: H01L21/28 ,  H01L21/316 ,  H01L23/532 ,  H01L29/51

    CPC classification number: H01L21/28185 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/28194 ,  H01L21/31633 ,  H01L23/5329 ,  H01L23/53295 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A structure and method for an insulator layer having carbon-graded layers above a substrate is disclosed, wherein the concentration of carbon increases in each successive carbon-graded layer above the substrate. The insulator comprises a low-k dielectric having a dielectric constant less than 3.3. The carbon-graded layer increases adhesion between the substrate and the insulator and between the insulator and the conductor layer. The structure may also include stabilization interfaces between the carbon-graded layers. More specifically, the carbon-graded layers include a first layer adjacent the substrate having a carbon content between about 5% and 20%, a second layer above the first layer having a carbon content between about 10% and 30%, and a third layer above the second layer having a carbon content between about 20% and 40%.

    Abstract translation: 公开了一种用于在衬底上方具有碳渐变层的绝缘体层的结构和方法，其中在衬底上方的每个连续碳渐变层中的碳浓度增加。 绝缘体包括具有小于3.3的介电常数的低k电介质。 碳渐变层增加了衬底和绝缘体之间以及绝缘体和导体层之间的粘附力。 该结构还可以包括碳梯度层之间的稳定界面。 更具体地说，碳缓变层包括与碳含量在约5％和20％之间的衬底相邻的第一层，在第一层之上的含碳量在约10％和30％之间的第二层，以及第三层 在碳含量在约20％和40％之间的第二层之上。

    COPPER INTERCONNECTION OF METAL SEED LAYER INSERTION STRUCTURE
    3.
    发明专利
    COPPER INTERCONNECTION OF METAL SEED LAYER INSERTION STRUCTURE 失效

    公开(公告)号：JPH11340229A

    公开(公告)日：1999-12-10

    申请号：JP11751399

    申请日：1999-04-26

    Applicant: IBM

    Inventor： EDELSTEIN DANIEL CHARLES ,  HARPER JAMES MCKELL EDWIN ,  HU CHAO-KUN ,  SIMON ANDREW H ,  UZOH CYPRIAN EMEKA

    IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532

    Abstract: PROBLEM TO BE SOLVED: To provide an interconnected structure of copper alloys having improved electromigration resistance force, adhesion and other surface characteristics. SOLUTION: Copper conductor bodies 56 and 60 and a copper alloy or metal seed layer 76 disposed between the copper conductor bodies and an electronic device are utilized to provide a novel interconnected structure for establishing electrical communication with the electronic device. In order to improve the electromigration resistance force, an adhesion property to a barrier layer, device surface characteristics or an adhesion process, copper-based seed layers of various decompositions or a specific metal seed layer can be used according to each purpose.

    MULTI-LEVEL COFACE INTERCONNECTING STRUCTURE
    9.
    发明专利
    MULTI-LEVEL COFACE INTERCONNECTING STRUCTURE 失效

    公开(公告)号：JP2001284454A

    公开(公告)日：2001-10-12

    申请号：JP2001047144

    申请日：2001-02-22

    Applicant: IBM

    Inventor： DAVIS CHARLES R ,  EDELSTEIN DANIEL CHARLES ,  HAY JOHN C ,  HEDRICK JEFFREY C ,  JAHNES CHRISTOPHER ,  MC GAHAY VINCENT ,  NYE HENRY A

    IPC: H01L21/768 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532

    Abstract: PROBLEM TO BE SOLVED: To improve a rigidity of a backend-of-line structure. SOLUTION: The damascene structure of interconnecting multi-level coppers on an integrated circuit chip includes several line conductors which are on the integrated circuit and are separated by dielectric materials having quite low dielectric constant and high elastic modulus. A second flat interconnection layer 18 on the first flat interconnection layer 14, consists of a dielectric film 26 having a higher elastic modulus than that of a dielectric material in the first flat interconnection layer 14, and an electrical conduction via 28 passing through the dielectric film 26. Electrical conduction vias 28 contact line conductors 22 selectively. A third flat interconnection layer 20 on the second flat interconnection layer 18, has several line conductors 22 which are isolated by dielectric materials and contact electrical conduction vias selectively.

    10.
    发明专利
    未知

    公开(公告)号：DE69929496T2

    公开(公告)日：2006-08-24

    申请号：DE69929496

    申请日：1999-03-09

    Applicant: IBM

    Inventor： EDELSTEIN DANIEL CHARLES ,  HARPER JAMES MCKELL EDWIN WINC ,  HU CHAO-KUN ,  SIMON ANDREW H ,  UZOH CYPRIAN EMEKA

    IPC: H01L23/52 ,  H01L23/532 ,  H01L21/3205 ,  H01L21/768

    Abstract: The present invention discloses an interconnection structure for providing electrical communication with an electronic device which includes a body that is formed substantially of copper and a seed layer of either a copper alloy or a metal that does not contain copper sandwiched between the copper conductor body and the electronic device for improving the electromigration resistance, the adhesion property and other surface properties of the interconnection structure. The present invention also discloses methods for forming an interconnection structure for providing electrical connections to an electronic device by first depositing a seed layer of copper alloy or other metal that does not contain copper on an electronic device, and then forming a copper conductor body on the seed layer intimately bonding to the layer such that electromigration resistance, adhesion and other surface properties of the interconnection structure are improved.

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