Abstract:
A process for the preparation of a homojunction in a semiconductor substrate, e.g., a p-n junction, during growth of a heterojunction between the substrate and a second semiconductor consisting of either gallium nitride or aluminum nitride where aluminum atoms from the aluminum nitride or gallium atoms from the gallium nitride diffuse into the substrate in a region of the substrate adjacent the aluminum nitride or gallium nitride to form the homojunction.
Abstract:
PROBLEM TO BE SOLVED: To provide a method for manufacturing a high-quality silicon-on- insulator (SOI) substrate material having a buried oxide (BOX) region whose thickness is about 300 nm or less. SOLUTION: In this method, a high quality SOI substrate is formed by using a plurality of implants and a plurality of annealing steps. Particularly, this method includes at least a first oxygen ion implant wherein a primary oxide seed region is formed, a first annealing step, a second oxygen ion implant wherein a BOX adjustment oxide seed region is formed, and a second annealing step. In the annealing step, the seed region is converted into an embedded oxide region. COPYRIGHT: (C)2004,JPO
Abstract:
PHOTOELECTRICAL CONVERTER A photoresponsive device for the photoelectrical conversion of energy is formed in a device body which has first and second major parallel opposed surfaces. A photoresponsive active region of semiconductor material is formed along one major surface and a thermally absorbing member is bonded to the other major surface. A region of electrically insulating material is provided which is epitaxial with the photoresponsive active region and separates the active region from the second major surface.
Abstract:
SILICON SOLAR CELL A high efficiency silicon solar cell may be constructed by providing a two-stage emitter with a 1 micron thickness on a base region with a back surface field. The stage of the emitter adjacent to the junction is moderately doped to minimize bandgap shrinkage and to maximize carrier lifetime while the stage of the emitter adjacent the surface is highly doped to minimize sheet resistance. An aiding drift field may be added to both the emitter and base regions. The full size of the base is less than an effective diffusion length. A back surface field is provided adjacent the ohmic contact on the part of the base remote from the junction. YO978-013
Abstract:
PROCESS FOR DIFFUSING IMPURITIES INTO A SEMICONDUCTOR BODY A process for diffusing a dopant into a III-V type semiconductor body is disclosed which comprises: a) placing in a heating chamber which is substantially devoid of any oxidizing substance a deposition substrate possessing a dopant-containing layer which has been vapor deposited upon a major surface thereof in contact with, or in the proximity of, an object substrate fabricated from a III-V type semiconductor material with the dopant-containing layer of the deposition substrate being substantially opposed to a major surface of the object substrate; b) introducing into the heating chamber a source of Group V element corresponding to the Group V element of the object substrate, said source being capable of providing Group V element in the vapor phase at the diffusion temperature with the vapor pressure of the vapor phase Group V element being at or above the equilibrium vapor pressure of the Group V element present at the surface of the object substrate; and, c) heating the deposition substrate and the object substrate to the diffusion temperature for a period of time sufficient to diffuse a predetermined amount of dopant into the object substrate to a predetermined depth therein.
Abstract:
Semiconductor devices can be fabricated using as an intermediate manufacturing structure a substrate of one semiconductor with a thin epitaxial surface layer of a different semiconductor with properties such that the semiconductors each have different solubilities with respect to a metal. When a vertical differentiation is used to expose the different materials and the metal is deposited on both and heated, the metal will form a Schottky barrier in one material and an ohmic contact in the other. Where the substrate is gallium arsenide and the epitaxial layer is gallium aluminum arsenide and the metal is tin, a self-aligned gallium arsenide MESFET is formed wherein the tin forms ohmic contacts with the gallium arsenide and a Schottky barrier contact with the gallium aluminum arsenide.
Abstract:
A GaN electroluminescent structure has been fabricated on a silicon substrate allowing for the construction of light-emitting diodes in the visible region on a planar surface carrying other silicon dependent devices.