公开(公告)号：AU1330897A

公开(公告)日：1998-07-15

申请号：AU1330897

申请日：1996-12-16

Applicant: IBM

Inventor： ANDRICACOS PANAYOTIS CONSTANTI ,  DELIGIANNI HARIKLIA ,  DUKOVIC JOHN OWEN ,  HORKANS WILMA JEAN ,  UZOH CYPRIAN EMEKA ,  WONG KWONG HON ,  HU CHAO-KUN ,  EDELSTEIN DANIEL CHARLES ,  RODBELL KENNETH PARKER ,  HURD JEFFERY LOUIS

IPC: C25D7/12 ,  H01L21/28 ,  H01L21/288 ,  H01L21/768 ,  H01L23/532

Abstract: A process is described for the fabrication of submicron interconnect structures for integrated circuit chips. Void-free and seamless conductors are obtained by electroplating Cu from baths that contain additives and are conventionally used to deposit level, bright, ductile, and low-stress Cu metal. The capability of this method to superfill features without leaving voids or seams is unique and superior to that of other deposition approaches.