公开(公告)号：DE2963294D1

公开(公告)日：1982-08-26

申请号：DE2963294

申请日：1979-08-07

Applicant: IBM

Inventor： HELLER LAWRENCE GRIFFITH ,  JONES HARRY JORDAN ,  KOTECHA HARISH N ,  SODERMAN DONALD ARVID

IPC: H01L21/339 ,  H01L21/265 ,  H01L21/8234 ,  H01L27/07 ,  H01L27/105 ,  H01L29/762 ,  H01L27/10 ,  H01L21/82 ,  H01L27/06

公开(公告)号：DE3787429D1

公开(公告)日：1993-10-21

申请号：DE3787429

申请日：1987-05-19

Applicant: IBM

Inventor： BHATIA HARSARAN SINGH ,  ECKER MARIO ENRIQUE ,  JONES HARRY JORDAN ,  MALAVIYA SHASHI DHAR

IPC: H01L21/82 ,  G06F1/22 ,  H01L21/822 ,  H01L23/538 ,  H01L27/04 ,  H01L23/52 ,  G06F1/00

公开(公告)号：AU590413B2

公开(公告)日：1989-11-02

申请号：AU7214387

申请日：1987-04-28

Applicant: IBM

Inventor： HODGSON RODNEY TREVOR ,  JONES HARRY JORDAN ,  LEDERMANN PETER GERARD ,  REILEY TIMOTHY CLARK ,  MOSKOWITZ PAUL ANDREW

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/538 ,  H05K3/40 ,  H01L23/50 ,  H05K1/11

公开(公告)号：DE3788455D1

公开(公告)日：1994-01-27

申请号：DE3788455

申请日：1987-04-10

Applicant: IBM

Inventor： HODGSON RODNEY TREVOR ,  JONES HARRY JORDAN ,  LEDERMANN PETER GERARD ,  REILEY TIMOTHY CLARK ,  MOSKOWITZ PAUL ANDREW

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/538 ,  H05K3/40 ,  H01L23/498 ,  H01L23/52

公开(公告)号：DE3783672T2

公开(公告)日：1993-07-08

申请号：DE3783672

申请日：1987-05-12

Applicant: IBM

Inventor： BHATIA HARSARAN SINGH ,  JONES HARRY JORDAN ,  MALAVIYA SHASHI DHAR

IPC: H03K19/082 ,  H03K19/086 ,  H03K19/173 ,  H02H3/38 ,  G05F1/20

Abstract: A new dotting circuit for integrated circuit chips which provides line switching, as well as simultaneous true and complementary outputs (46,48), while eliminating the need for the standard collector circuit voltage clamp. This circuit is implemented by the collector dotting of two or more input transistors (12,22), the collector dotting of their respective reference transistors (55,56), the emitter dotting of one input transistor (12) and a reference transistor (55) to a constant current source (90), the emitter dotting of the other input transistor (22) and the other reference transistor (56) to a different constant current source (100), and an inhibit circuit (72) for permitting current to flow to only one of the emitter-dotted circuits in accordance with a logic control signal.

公开(公告)号：AU7214387A

公开(公告)日：1987-11-05

申请号：AU7214387

申请日：1987-04-28

Applicant: IBM

Inventor： HODGSON RODNEY TREVOR ,  JONES HARRY JORDAN ,  LEDERMANN PETER GERARD ,  REILEY TIMOTHY CLARK ,  MOSKOWITZ PAUL ANDREW

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/538 ,  H05K3/40 ,  H01L23/50 ,  H05K1/11

公开(公告)号：DE3788455T2

公开(公告)日：1994-06-23

申请号：DE3788455

申请日：1987-04-10

Applicant: IBM

Inventor： HODGSON RODNEY TREVOR ,  JONES HARRY JORDAN ,  LEDERMANN PETER GERARD ,  REILEY TIMOTHY CLARK ,  MOSKOWITZ PAUL ANDREW

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/538 ,  H05K3/40 ,  H01L23/498 ,  H01L23/52

公开(公告)号：DE3787429T2

公开(公告)日：1994-04-21

申请号：DE3787429

申请日：1987-05-19

Applicant: IBM

Inventor： BHATIA HARSARAN SINGH ,  ECKER MARIO ENRIQUE ,  JONES HARRY JORDAN ,  MALAVIYA SHASHI DHAR

IPC: H01L21/82 ,  G06F1/22 ,  H01L21/822 ,  H01L23/538 ,  H01L27/04 ,  H01L23/52 ,  G06F1/00

公开(公告)号：DE3783672D1

公开(公告)日：1993-03-04

申请号：DE3783672

申请日：1987-05-12

Applicant: IBM

Inventor： BHATIA HARSARAN SINGH ,  JONES HARRY JORDAN ,  MALAVIYA SHASHI DHAR

IPC: H03K19/082 ,  H03K19/086 ,  H03K19/173 ,  H02H3/38 ,  G05F1/20

Abstract: A new dotting circuit for integrated circuit chips which provides line switching, as well as simultaneous true and complementary outputs (46,48), while eliminating the need for the standard collector circuit voltage clamp. This circuit is implemented by the collector dotting of two or more input transistors (12,22), the collector dotting of their respective reference transistors (55,56), the emitter dotting of one input transistor (12) and a reference transistor (55) to a constant current source (90), the emitter dotting of the other input transistor (22) and the other reference transistor (56) to a different constant current source (100), and an inhibit circuit (72) for permitting current to flow to only one of the emitter-dotted circuits in accordance with a logic control signal.