公开(公告)号：WO2008128897A2

公开(公告)日：2008-10-30

申请号：PCT/EP2008054306

申请日：2008-04-09

Applicant: IBM ,  IBM UK ,  CANNON ETHAN HARRISON ,  FURUKAWA TOSHIHARU ,  GAUDIELLO JOHN GERARD ,  HAKEY MARK CHARLES ,  HOLMES STEVEN JOHN ,  HORAK DAVID VACLAV ,  KOBURGER III CHARLES WILLIAM ,  MANDELMAN JACK ALLAN ,  TONTI WILLIAM ROBERT

Inventor： CANNON ETHAN HARRISON ,  FURUKAWA TOSHIHARU ,  GAUDIELLO JOHN GERARD ,  HAKEY MARK CHARLES ,  HOLMES STEVEN JOHN ,  HORAK DAVID VACLAV ,  KOBURGER III CHARLES WILLIAM ,  MANDELMAN JACK ALLAN ,  TONTI WILLIAM ROBERT

CPC classification number: H01L21/76264

Abstract: Hybrid substrates characterized by semiconductor islands of different crystal orientations and methods of forming such hybrid substrates. The methods involve using a SIMOX process to form an insulating layer. The insulating layer may divide the islands of at least one of the different crystal orientations into mutually aligned device and body regions. The body regions may be electrically floating relative to the device regions.

Abstract translation: 以不同晶体取向的半导体岛为特征的混合衬底以及形成这种混合衬底的方法。 这些方法涉及使用SIMOX工艺来形成绝缘层。 绝缘层可以将不同晶体取向中的至少一个的岛分成相互对准的器件区和体区。 本体区域可以相对于器件区域电浮动。

公开(公告)号：DE3670402D1

公开(公告)日：1990-05-17

申请号：DE3670402

申请日：1986-01-17

Applicant: IBM

Inventor： ABERNATHEY JOHN ROBERT ,  KOBURGER III CHARLES WILLIAM

IPC: H01L27/08 ,  H01L21/20 ,  H01L21/225 ,  H01L21/76 ,  H01L21/762 ,  H01L29/78

Abstract: A process for making complementary transistor devices - (11, 12) in an epitaxial layer (14) of a first conductivity type having a deep vertical isolation sidewall (21) between the N and P channel transistors by providing a backfilled cavity - (26) in the epitaxial layer, the sidewalls of the cavity being coated with layers of material, the first layer being a silicate doped with the same conductivity type as the epitaxial layer (14) and in contact with the epitaxial layer. The first layer is overcoated with an isolation and diffusion barrier layer (21). A second silicate layer is provided which is doped to a conductivity opposite to that of the first layer and isolated therefrom by said isolation and diffusion barrier material (21). The cavity (26) is backfilled with semiconductor material of a conductivity type opposite to that of the epitaxial layer (14) and during this backfilling operation the dopants in the first and second layer outdiffuse into the epitaxial layer and into the backfill material, respectively, to prevent the creation of oarasitic channels.

公开(公告)号：DE3277753D1

公开(公告)日：1988-01-07

申请号：DE3277753

申请日：1982-06-29

Applicant: IBM

Inventor： GEIPEL HENRY JOHN ,  HSIEH NING ,  KOBURGER III CHARLES WILLIAM ,  NESBIT LARRY ALAN

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/321 ,  H01L21/336 ,  H01L21/768 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L21/285 ,  H01L21/60 ,  H01L21/316

Abstract: The method includes depositing a conductive first polysilicon layer on a semiconductor structure, co-depositing on said layer polysilicon and a silicide forming metal in stoichiometric proportions to form an intermetallic compound, and depositing on top of it a second polysilicon layer providing 30 to 100 % of the silicon required to form a silicon dioxide layer in a subsequent thermal oxidation step. … The method is used in fabricating integrated circuit structures e.g. silicon gate MOSFET devices with self-passivating, low resistivity interconnection electrodes where voids in the first polysilicon layer are substantially eliminated.

公开(公告)号：IN261DEN2015A

公开(公告)日：2015-07-10

申请号：IN261DEN2015

申请日：2015-01-12

Applicant: IBM

Inventor： FURUKAWA TOSHIHARU ,  KOBURGER III CHARLES WILLIAM ,  SLINKMAN JAMES ALBERT

IPC: H01L27/12 ,  H01L21/336 ,  H01L21/762 ,  H01L21/84 ,  H01L29/786

Abstract: A silicon-on-insulator (SOI) device and structure having locally strained regions in the silicon active layer formed by increasing the thickness of underlying regions of a buried insulating layer separating the silicon active layer from the substrate. The stress transferred from the underlying thickened regions of the insulating layer to the overlying strained regions increases carrier mobility in these confined regions of the active layer. Devices formed in and on the silicon active layer may benefit from the increased carrier mobility in the spaced-apart strained regions.