公开(公告)号：DE3175419D1

公开(公告)日：1986-11-06

申请号：DE3175419

申请日：1981-10-20

Applicant: IBM

Inventor： GRISE GARY DOUGLAS ,  HSIEH NING ,  KALTER HOWARD LEO ,  LAM CHUNG HON

IPC: G11C14/00 ,  G11C11/34 ,  G11C16/04 ,  G11C17/00 ,  H01L21/8247 ,  H01L27/10 ,  H01L29/788 ,  H01L29/792

Abstract: A memory system, particularly an electrically alterable read only memory system which includes a semiconductor substrate (10) having a diffusion region (12) therein defining one end of a channel region (14), a control plate (22, T1), a floating plate (20) separated from the channel region by a thin dielectric layer (16) and disposed between the control plate (22) and the channel region (14) and means (T1-T3) for transferring charge to and from the floating plate (22). A control gate (32) is coupled to the channel region (14) and is located between the diffusion region (12) and the floating plate (22). The control gate (32) may be connected to a word line and the diffusion region (12) may be connected to a bit/sense line. The channel region (14) is controlled by the word line and the presence or absence of charge on the floating plate (20). Thus, information may be read from a cell of the memory by detecting the presence or absence of charge stored in the inversion capacitor under the floating plate (20). The charge transfer means (T1, T3) includes an enhanced conduction insulator (24) and means (T1-T3) for applying appropriate voltages to the control plate (22) and to the control gate (32) to transfer charge to and from the floating plate (20) through the enhanced conduction insulator (24).

公开(公告)号：DE3277753D1

公开(公告)日：1988-01-07

申请号：DE3277753

申请日：1982-06-29

Applicant: IBM

Inventor： GEIPEL HENRY JOHN ,  HSIEH NING ,  KOBURGER III CHARLES WILLIAM ,  NESBIT LARRY ALAN

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/321 ,  H01L21/336 ,  H01L21/768 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L21/285 ,  H01L21/60 ,  H01L21/316

Abstract: The method includes depositing a conductive first polysilicon layer on a semiconductor structure, co-depositing on said layer polysilicon and a silicide forming metal in stoichiometric proportions to form an intermetallic compound, and depositing on top of it a second polysilicon layer providing 30 to 100 % of the silicon required to form a silicon dioxide layer in a subsequent thermal oxidation step. … The method is used in fabricating integrated circuit structures e.g. silicon gate MOSFET devices with self-passivating, low resistivity interconnection electrodes where voids in the first polysilicon layer are substantially eliminated.

公开(公告)号：DE3370558D1

公开(公告)日：1987-04-30

申请号：DE3370558

申请日：1983-05-25

Applicant: IBM

Inventor： HSIEH NING ,  IRENE EUGENE ARTHUR ,  ISHAQ MOUSA HANNA ,  ROBERTS STANLEY

IPC: C01B33/12 ,  B05D5/12 ,  C01B33/113 ,  H01B3/02 ,  H01G2/12 ,  H01G4/06 ,  H01G4/08 ,  H01G4/10 ,  H01L21/314 ,  H01L21/316 ,  H01L21/822 ,  H01L27/04 ,  H01L29/94

Abstract: An improved method of fabricating a stable high dielectric constant and low leakage dielectric material includes oxidizing at a temperature of about 400°C or higher a layer of a transition metal-silicon alloy having 40% to 90% transition metal by atomic weight to produce a silicate or homogeneous mixture. The mixture includes an oxide of the transition metal and silicon dioxide. The alloy may be deposited on, e.g., a semiconductor or an electrically conductive layer that is oxidation resistant, and the thickness of the mixture or oxidized alloy should be within the range of 5 to 50 nanometers. By depositing an electrically conductive layer on the homogeneous mixture, a capacitor having a high dielectric, low leakage dielectric medium is provided.