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公开(公告)号:JPH11265985A
公开(公告)日:1999-09-28
申请号:JP10499
申请日:1999-01-04
Applicant: IBM
Inventor: BRONNER GARY B , GAMBINO JEFFREY P , KOTECKI DAVID E
IPC: H01L21/28 , H01L21/306 , H01L21/768 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/788 , H01L29/792
Abstract: PROBLEM TO BE SOLVED: To provide a method for forming the patterned metal electrode when the metal itself is hard to etch. SOLUTION: The pattern of the metal than is hard to etch is formed by converting the metal that is hard to etch into a plurality of metal components that can be etched in the region, wherein the metal than is hard to etch is removed. This method includes the step, which attaches a metal layer 8 that is hard to etch on a sacrifice metal composition layer 7 and an exposed region, the step, which forms a plurality of metal compositions that can be etched by the reaction of the sacrifice metal composition layer 7 and the metal 8 that is hard to etch, and the step, which selectively removes the plurality of the metal compositions that can be etched and makes to remain the patterned metal layer that is hard to etch on the surface.
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公开(公告)号:JP2001358229A
公开(公告)日:2001-12-26
申请号:JP2001134513
申请日:2001-05-01
Applicant: IBM , INFINEON TECHNOLOGIES CORP
Inventor: YUN YUU WAN , JAMMY RAJARAO , KIMBALL LEE J , KOTECKI DAVID E , LIAN JENNY , CHENTEIN RIN , MILLER JOHN A , NAGEL NICHOLAS , SHEN HUA , WILDMAN HORATIO S
IPC: H01L27/108 , H01L21/02 , H01L21/8242
Abstract: PROBLEM TO BE SOLVED: To provide a recessed electrode structure which interrupts the crystal grain boundary of an electrode and blocks the diffusion from the side wall. SOLUTION: The capacitor structure comprises an upper platinum electrode, a lower electrode and an insulator on the side wall of the electrode, and the lower electrode has a first recessed portion deposited to the insulator on its side wall and a second insulator portion deposited thereto.
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公开(公告)号:DE10219841A1
公开(公告)日:2003-02-13
申请号:DE10219841
申请日:2002-05-03
Applicant: INFINEON TECHNOLOGIES CORP , IBM
Inventor: PARK YOUNGJIN , COSTRINI GREG , KOTECKI DAVID E , LEE HEON
IPC: H01L21/60 , H01L21/768 , H01L21/8242 , H01L27/108 , H01L21/283
Abstract: Methods for fabricating a semiconductor device are disclosed. Parallel gate structures are formed on a substrate with spaces between the gate structures. A blanket depositing of a conductive material is performed to fill the spaces and cover the gate structures such that contact with the substrate is made by the conductive material. A mask is patterned to remain over active area regions. The mask remains over the spaces. The conductive material is removed in accordance with the mask to provide contacts formed from the conductive material which fills the spaces over the active areas. A dielectric layer is deposited over the gate structures and over the contacts. Holes down to the contacts are formed, and a conductive region is connected to the contacts through the holes.
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公开(公告)号:DE10219841B4
公开(公告)日:2007-11-29
申请号:DE10219841
申请日:2002-05-03
Applicant: INFINEON TECHNOLOGIES CORP , IBM
Inventor: PARK YOUNGJIN , COSTRINI GREG , KOTECKI DAVID E , LEE HEON
IPC: H01L21/283 , H01L21/60 , H01L21/768 , H01L21/8242 , H01L27/108
Abstract: Methods for fabricating a semiconductor device are disclosed. Parallel gate structures are formed on a substrate with spaces between the gate structures. A blanket depositing of a conductive material is performed to fill the spaces and cover the gate structures such that contact with the substrate is made by the conductive material. A mask is patterned to remain over active area regions. The mask remains over the spaces. The conductive material is removed in accordance with the mask to provide contacts formed from the conductive material which fills the spaces over the active areas. A dielectric layer is deposited over the gate structures and over the contacts. Holes down to the contacts are formed, and a conductive region is connected to the contacts through the holes.
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