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    Error detection in processor status register files
    2.
    发明专利
    Error detection in processor status register files 未知

    公开(公告)号：GB2455212A

    公开(公告)日：2009-06-03

    申请号：GB0823157

    申请日：2008-12-19

    Applicant: IBM

    Inventor： GERWIG GUENTER ,  MAYER ULRICH ,  LEHNERT FRANK ,  SWANEY SCOTT BARNETT ,  WOERNER ALEXANDER ,  KRAUCH ULRICH

    IPC: G06F11/10

    Abstract: When a central processing unit (CPU) writes processor status to a register file 22, an error correction code is generated 20,21 from the word write selection 12,13, the register file write selection 10, the register file write address 11 and the write data 14,15. The error correction code is stored with the data in the register file. When the data is read back, an error correction code is generated from the word read selection, the register file read selection, the register file read address and the read data. This is compared with the value which was stored when the data was written. Any difference signifies an error. The processor status may be stored in the register file as two separate words with separate error correction codes. In this case, the high and low words are selected using the word write selection and the word read selection.

    FIXING EARLY MODE SLACKS IN A CIRCUIT DESIGN
    3.
    发明专利
    FIXING EARLY MODE SLACKS IN A CIRCUIT DESIGN 未知

    公开(公告)号：GB2506275A

    公开(公告)日：2014-03-26

    申请号：GB201315088

    申请日：2013-08-23

    Applicant: IBM

    Inventor： LIND KURT ,  WOERNER ALEXANDER ,  HALLER WILHELM ,  KRAUCH ULRICH

    IPC: G06F17/50

    Abstract: Fixing an early mode slack in a hierarchically designed hardware device with at least one source macro, an integration unit and at least one sink macro. Hardware design timing data is loaded to determine pins where an early mode slack fix can be applied; for each such pin determining a location across the design hierarchy for the early mode slack fix by calculating a weight value for each of a selection of fix locations of the early mode slack based on absolute values of arrival times of data signals, ratio and difference between arrival times of late mode data signals and early mode data signals; and assigning the early mode slack fix to the determined location based on said weight value. The hardware design timing data can be filtered to determine sink macro input pins. Asssignments of critical pins to be fixed in the source or sink macro by adding delay devices or buffers may be made.

    FIXING EARLY MODE SLACKS IN A CIRCUIT DESIGN
    7.
    发明专利
    FIXING EARLY MODE SLACKS IN A CIRCUIT DESIGN 未知

    公开(公告)号：GB2506179A

    公开(公告)日：2014-03-26

    申请号：GB201217030

    申请日：2012-09-25

    Applicant: IBM

    Inventor： LIND KURT ,  WOERNER ALEXANDER ,  HALLER WILHELM ,  KRAUCH ULRICH

    IPC: G06F17/50

    Abstract: Fixing an early mode slack in a hierarchically designed hardware device with at least one source macro, an integration unit and at least one sink macro. Hardware design timing data is loaded to determine pins where an early mode slack fix can be applied; for each such pin determining a location across the design hierarchy for the early mode slack fix by calculating a weight value for each of a selection of fix locations of the early mode slack based on absolute values of arrival times of data signals, ratio and difference between arrival times of late mode data signals and early mode data signals; and assigning the early mode slack fix to the determined location based on said weight value. The hardware design timing data can be filtered to determine sink macro input pins. Asssignments of critical pins to be fixed in the source or sink macro by adding delay devices or buffers may be made.

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