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    5.
    发明专利
    未知

    公开(公告)号：DE69116227D1

    公开(公告)日：1996-02-22

    申请号：DE69116227

    申请日：1991-04-13

    Applicant: IBM

    Inventor： LEACH MICHAEL ALBERT ,  MACHESNEY BRIAN JOHN ,  NOWAK EDWARD JOSEPH

    IPC: H01L21/304 ,  B24B37/013 ,  G01B7/14 ,  H01L21/302 ,  H01L21/66 ,  H01L21/30 ,  G01B7/06

    Abstract: The present invention relates to a method and apparatus for remotely detecting impedance. It is specifically adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first, or stationary coil (48) having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil (48) to provide a magnetic flux in the air gap (66,68,70,72). A second coil (46) is mounted for rotation on the polishing table (26), in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts (42) which are embedded in the surface of the polishing wheel. The contacts are positioned to engage the surface of the substrate which is being polished and provide a load on the second or rotating coil. The rotating coil, when it is in the air gap (66,68,70,72) of the stationary coil, will perturb the flux field therein as a function of the resistance of the load caused by the contacts (42) contacting either a conducting surface or a non-conducting surface. This perturbance of the flux field is measured as a change in the induced voltage in the stationary coil which in turn is converted to a signal which is processed to indicate the end point of polishing, the end point being when a metallic layer has been removed to expose a dielectric layer therebeneath or, conversely, when a dielectric layer has been removed to expose a metallic layer therebeneath.

    6.
    发明专利
    未知

    公开(公告)号：DE3777514D1

    公开(公告)日：1992-04-23

    申请号：DE3777514

    申请日：1987-05-05

    Applicant: IBM

    Inventor： LU NICKY CHAU-CHUN ,  MACHESNEY BRIAN JOHN

    IPC: H01L27/04 ,  G11C11/24 ,  H01L21/20 ,  H01L21/205 ,  H01L21/74 ,  H01L21/763 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

    Abstract: A fabrication process for providing an epitaxial layer on a silicon substrate and over predefined insulator-capped islands (18) which forms a self-aligned contact window in the epitaxial layer. Application of the method to a three-dimensional dynamic random access memory (DRAM) device structure is shown, with an access transistor (80, 84, 98) formed in monocrystalline silicon (30) stacked on top of a trench capacitor. A fabrication method therefor is shown wherein the contact window (52) for the source-to-trench connection is formed by self-aligned lateral epitaxial growth, followed by a contact-connection formation step using either a second epitaxial growth or a CVD refill and strapping process. The invention can be further applied to other device structures using the described principles, and more specifically to an inverter structure having the driver device stacked over the load-resistor as another example, which can be used as a basic building circuit unit for logic circuits and static-RAM cell.

    7.
    发明专利
    未知

    公开(公告)号：AT73962T

    公开(公告)日：1992-04-15

    申请号：AT87106472

    申请日：1987-05-05

    Applicant: IBM

    Inventor： LU NICKY CHAU-CHUN ,  MACHESNEY BRIAN JOHN

    IPC: H01L27/04 ,  G11C11/24 ,  H01L21/20 ,  H01L21/205 ,  H01L21/74 ,  H01L21/763 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

    Abstract: A fabrication process for providing an epitaxial layer on a silicon substrate and over predefined insulator-capped islands (18) which forms a self-aligned contact window in the epitaxial layer. Application of the method to a three-dimensional dynamic random access memory (DRAM) device structure is shown, with an access transistor (80, 84, 98) formed in monocrystalline silicon (30) stacked on top of a trench capacitor. A fabrication method therefor is shown wherein the contact window (52) for the source-to-trench connection is formed by self-aligned lateral epitaxial growth, followed by a contact-connection formation step using either a second epitaxial growth or a CVD refill and strapping process. The invention can be further applied to other device structures using the described principles, and more specifically to an inverter structure having the driver device stacked over the load-resistor as another example, which can be used as a basic building circuit unit for logic circuits and static-RAM cell.

    8.
    发明专利
    未知

    公开(公告)号：DE69116227T2

    公开(公告)日：1996-07-04

    申请号：DE69116227

    申请日：1991-04-13

    Applicant: IBM

    Inventor： LEACH MICHAEL ALBERT ,  MACHESNEY BRIAN JOHN ,  NOWAK EDWARD JOSEPH

    IPC: H01L21/304 ,  B24B37/013 ,  G01B7/14 ,  H01L21/302 ,  H01L21/66 ,  H01L21/30 ,  G01B7/06

    Abstract: The present invention relates to a method and apparatus for remotely detecting impedance. It is specifically adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first, or stationary coil (48) having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil (48) to provide a magnetic flux in the air gap (66,68,70,72). A second coil (46) is mounted for rotation on the polishing table (26), in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts (42) which are embedded in the surface of the polishing wheel. The contacts are positioned to engage the surface of the substrate which is being polished and provide a load on the second or rotating coil. The rotating coil, when it is in the air gap (66,68,70,72) of the stationary coil, will perturb the flux field therein as a function of the resistance of the load caused by the contacts (42) contacting either a conducting surface or a non-conducting surface. This perturbance of the flux field is measured as a change in the induced voltage in the stationary coil which in turn is converted to a signal which is processed to indicate the end point of polishing, the end point being when a metallic layer has been removed to expose a dielectric layer therebeneath or, conversely, when a dielectric layer has been removed to expose a metallic layer therebeneath.

    10.
    发明专利
    未知

    公开(公告)号：MX165273B

    公开(公告)日：1992-11-04

    申请号：MX867587

    申请日：1987-10-02

    Applicant: IBM

    Inventor： LU NICKY CHAU-CHUN ,  MACHESNEY BRIAN JOHN

    IPC: H01L27/04 ,  G11C11/24 ,  H01L21/20 ,  H01L21/205 ,  H01L21/74 ,  H01L21/763 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L21/70

    Abstract: A fabrication process for providing an epitaxial layer on a silicon substrate and over predefined insulator-capped islands (18) which forms a self-aligned contact window in the epitaxial layer. Application of the method to a three-dimensional dynamic random access memory (DRAM) device structure is shown, with an access transistor (80, 84, 98) formed in monocrystalline silicon (30) stacked on top of a trench capacitor. A fabrication method therefor is shown wherein the contact window (52) for the source-to-trench connection is formed by self-aligned lateral epitaxial growth, followed by a contact-connection formation step using either a second epitaxial growth or a CVD refill and strapping process. The invention can be further applied to other device structures using the described principles, and more specifically to an inverter structure having the driver device stacked over the load-resistor as another example, which can be used as a basic building circuit unit for logic circuits and static-RAM cell.

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