公开(公告)号：EP1595154A4

公开(公告)日：2006-05-10

申请号：EP03713598

申请日：2003-02-20

Applicant: IBM

Inventor： GATTIKER ANNE ,  GROSCH DAVID A ,  KNOX MARC D ,  MOTIKA FRANCO ,  NIGH PHIL ,  VAN HORN JODY ,  ZUCHOWSKI PAUL S

IPC: G01R31/28 ,  G01R31/30 ,  G01R31/26

CPC classification number: G01R31/2879 ,  G01R31/275 ,  G01R31/2856 ,  G01R31/3004 ,  G01R31/3008

Abstract: Methods for testing a semiconductor circuit (10) including testing the circuit and modifying a well bias (14, 18) of the circuit during testing. The methods improve the resolution of voltage-based and IDDQ testing and diagnosis by modifying well bias during testing. In addition, the methods provide more efficient stresses during stress testing. The methods apply to ICs where the semiconductor well (wells and/or substrates) are wired separately from the chip VDD and GND, allowing for external control (40) of the well potentials during test. In general, the methods rely on using the well bias to change transistor threshold voltages.

公开(公告)号：DE60320314D1

公开(公告)日：2008-05-21

申请号：DE60320314

申请日：2003-02-20

Applicant: IBM

Inventor： GATTIKER ANNE ,  GROSCH DAVID A ,  KNOX MARC D ,  MOTIKA FRANCO ,  NIGH PHIL ,  VAN HORN JODY ,  ZUCHOWSKI PAUL S

IPC: G01R31/26 ,  G01R31/28 ,  G01R31/30

公开(公告)号：AU2003217641A1

公开(公告)日：2004-09-17

申请号：AU2003217641

申请日：2003-02-20

Applicant: IBM

Inventor： HORN JODY VAN ,  ZUCHOWSKI PAUL S ,  GATTIKER ANNE ,  GROSCH DAVID A ,  KNOX MARC D ,  MOTIKA FRANCO ,  NIGH PHIL

IPC: G01R31/28 ,  G01R31/30 ,  G01R31/26

公开(公告)号：AU2003213195A1

公开(公告)日：2004-09-17

申请号：AU2003213195

申请日：2003-02-20

Applicant: IBM

Inventor： ZUCHOWSKI PAUL S ,  OAKLAND STEVEN F ,  GATTIKER ANNE ,  NIGH PHIL ,  PASTEL LEAH ,  HORN JODY VAN

IPC: G01R31/3185 ,  H01L23/544 ,  H01L23/58 ,  H02J9/00

Abstract: A voltage island architecture wherein the source voltage of each voltage island can be independently turned on/off or adjusted during a scan-based test. The architecture includes a plurality of voltage islands, each powered by a respective island source voltage, and a testing circuit, coupled to the voltage islands, and powered by a global source voltage that is always on during test, wherein each island source voltage may be independently controlled during test.

公开(公告)号：DE60320314T2

公开(公告)日：2009-06-25

申请号：DE60320314

申请日：2003-02-20

Applicant: IBM

Inventor： GATTIKER ANNE ,  GROSCH DAVID A ,  KNOX MARC D ,  MOTIKA FRANCO ,  NIGH PHIL ,  VAN HORN JODY ,  ZUCHOWSKI PAUL S

IPC: G01R31/26 ,  G01R31/28 ,  G01R31/30

公开(公告)号：AT391926T

公开(公告)日：2008-04-15

申请号：AT03713598

申请日：2003-02-20

Applicant: IBM

Inventor： GATTIKER ANNE ,  GROSCH DAVID ,  KNOX MARC ,  MOTIKA FRANCO ,  NIGH PHIL ,  VAN HORN JODY ,  ZUCHOWSKI PAUL

IPC: G01R31/26 ,  G01R31/28 ,  G01R31/30