公开(公告)号：DE2460988A1

公开(公告)日：1975-09-11

申请号：DE2460988

申请日：1974-12-21

Applicant: IBM

Inventor： FENG BAI-CWO ,  FLACHBART RICHARD HENRY ,  FRIED LEONARD JOEL ,  LEVINE HAROLD A ,  POUGHKEEPSIE N Y

IPC: G03F7/039 ,  G03F7/095 ,  G03F7/26 ,  G03F7/30 ,  H01L21/00 ,  H01L21/027 ,  H01L21/30 ,  H01L21/306 ,  H01L23/29 ,  H05K3/02 ,  H05K3/04 ,  H05K3/06 ,  C23C3/02

Abstract: A method for use in forming thin film patterns in the fabrication of integrated circuits. The method involves depositing a bottom layer of positive photoresist material on a substrate, and forming over the bottom layer, a discrete light-transparent top layer of positive photoresist material which is less solubilized in developer after exposure to light than is the material in the bottom layer. The top and bottom layers are preferably separated by an intermediate layer of a light-transparent polymeric material which is immiscible in the bottom layer and unaffected by the subsequently applied top layer.

公开(公告)号：DE2331440A1

公开(公告)日：1974-01-17

申请号：DE2331440

申请日：1973-06-20

Applicant: IBM

Inventor： SONODA GEORGE ,  WADE WILLIAM THOMAS ,  POUGHKEEPSIE N Y ,  DESIMONE ROY RALPH ,  DONOFRIO NICHOLAS MICHAEL ,  LINTON RICHARD HENRY

IPC: G11C11/412 ,  G11C8/04 ,  G11C8/16 ,  G11C11/402 ,  G11C11/406 ,  G11C7/00

Abstract: An electronic data storage which operates as a DC stable storage array, but retains the advantages of an AC stable storage cell circuit. The AC stable storage cells are regenerated at a frequency asynchronous with respect to the storage cycle time. Gating means inhibit the regenerating signals when the system desires access, thereby permitting the storage cells to be accessed for information at any time in a completely random access mode.

公开(公告)号：DE2619964A1

公开(公告)日：1976-11-25

申请号：DE2619964

申请日：1976-05-06

Applicant: IBM

Inventor： GINDI ABRAHAM ,  HONG JU-HI JOHN ,  STELZENMULLER WILLIAM KARL ,  POUGHKEEPSIE N Y

IPC: H03M5/12 ,  H03K5/00 ,  H03L7/00 ,  H04J3/06 ,  H04L5/22 ,  H04L7/00 ,  H04L7/033 ,  H04L25/40 ,  H04L25/49 ,  H04Q11/04 ,  H04L25/08 ,  H03K13/01

Abstract: An improved clock retiming system for pulse coded data is provided in which the clock signals are extracted from the encoded data and first and second signals of the same amplitude and frequency but of different phase are generated from the clock signals. First and second amplifiers having variable gains provide amplification for the first and second signals, respectively. The first and second amplified signals are summed to produce a third signal having a phase which is a function of the relative amplitudes of the first and second amplified signals. The original pulse encoded data is sampled with the third signal to produce the retimed data output. The original pulse encoded data is also utilized to sample the third signal. The resulting signal is filtered to provide a DC voltage feedback error signal indicative of the phase difference between the third signal and the original pulse encoded data. This feedback signal is translated into a pair of complementary signals forming inputs to the first and second amplifiers, respectively, to vary the variable gains thereof, oppositely thereby adjusting the phase of the third signal to correspond to the phase of the original pulse encoded data.

公开(公告)号：DE2353999A1

公开(公告)日：1974-06-12

申请号：DE2353999

申请日：1973-10-27

Applicant: IBM

Inventor： DEPUY ARTHUR H ,  JOHNSON LEONARD F ,  POUGHKEEPSIE N Y ,  SCHEINBERG STANLEY

IPC: H01L21/822 ,  H01L21/00 ,  H01L21/301 ,  H01L21/66 ,  H01L21/82 ,  H01L27/02 ,  H01L27/04 ,  H01L19/00